--A1L65 is SA[7]~66 at LC115
A1L65_p1_out = PP[7] & !PSel[0] & !PSel[1];
A1L65_p2_out = A1L65 & PSel[0];
A1L65_p3_out = PP[7] & A1L65;
A1L65_p4_out = A1L65 & PSel[1];
A1L65_or_out = A1L65_p1_out # A1L65_p2_out # A1L65_p3_out # A1L65_p4_out;
A1L65 = A1L65_or_out;


--A1L55 is SA[6]~70 at LC117
A1L55_p1_out = PP[6] & !PSel[0] & !PSel[1];
A1L55_p2_out = A1L55 & PSel[0];
A1L55_p3_out = PP[6] & A1L55;
A1L55_p4_out = A1L55 & PSel[1];
A1L55_or_out = A1L55_p1_out # A1L55_p2_out # A1L55_p3_out # A1L55_p4_out;
A1L55 = A1L55_or_out;


--A1L45 is SA[5]~74 at LC118
A1L45_p1_out = PP[5] & !PSel[0] & !PSel[1];
A1L45_p2_out = A1L45 & PSel[0];
A1L45_p3_out = PP[5] & A1L45;
A1L45_p4_out = A1L45 & PSel[1];
A1L45_or_out = A1L45_p1_out # A1L45_p2_out # A1L45_p3_out # A1L45_p4_out;
A1L45 = A1L45_or_out;


--A1L35 is SA[4]~78 at LC120
A1L35_p1_out = PP[4] & !PSel[0] & !PSel[1];
A1L35_p2_out = A1L35 & PSel[0];
A1L35_p3_out = PP[4] & A1L35;
A1L35_p4_out = A1L35 & PSel[1];
A1L35_or_out = A1L35_p1_out # A1L35_p2_out # A1L35_p3_out # A1L35_p4_out;
A1L35 = A1L35_or_out;


--A1L25 is SA[3]~82 at LC123
A1L25_p1_out = PP[3] & !PSel[0] & !PSel[1];
A1L25_p2_out = A1L25 & PSel[0];
A1L25_p3_out = PP[3] & A1L25;
A1L25_p4_out = A1L25 & PSel[1];
A1L25_or_out = A1L25_p1_out # A1L25_p2_out # A1L25_p3_out # A1L25_p4_out;
A1L25 = A1L25_or_out;


--A1L15 is SA[2]~86 at LC125
A1L15_p1_out = PP[2] & !PSel[0] & !PSel[1];
A1L15_p2_out = A1L15 & PSel[0];
A1L15_p3_out = PP[2] & A1L15;
A1L15_p4_out = A1L15 & PSel[1];
A1L15_or_out = A1L15_p1_out # A1L15_p2_out # A1L15_p3_out # A1L15_p4_out;
A1L15 = A1L15_or_out;


--A1L05 is SA[1]~90 at LC126
A1L05_p1_out = PP[1] & !PSel[0] & !PSel[1];
A1L05_p2_out = A1L05 & PSel[0];
A1L05_p3_out = PP[1] & A1L05;
A1L05_p4_out = A1L05 & PSel[1];
A1L05_or_out = A1L05_p1_out # A1L05_p2_out # A1L05_p3_out # A1L05_p4_out;
A1L05 = A1L05_or_out;


--A1L94 is SA[0]~94 at LC128
A1L94_p1_out = PP[0] & !PSel[0] & !PSel[1];
A1L94_p2_out = A1L94 & PSel[0];
A1L94_p3_out = PP[0] & A1L94;
A1L94_p4_out = A1L94 & PSel[1];
A1L94_or_out = A1L94_p1_out # A1L94_p2_out # A1L94_p3_out # A1L94_p4_out;
A1L94 = A1L94_or_out;


--A1L46 is SB[7]~66 at LC94
A1L46_p1_out = PP[7] & PSel[0] & !PSel[1];
A1L46_p2_out = A1L46 & !PSel[0];
A1L46_p3_out = PP[7] & A1L46;
A1L46_p4_out = A1L46 & PSel[1];
A1L46_or_out = A1L46_p1_out # A1L46_p2_out # A1L46_p3_out # A1L46_p4_out;
A1L46 = A1L46_or_out;


--A1L36 is SB[6]~70 at LC97
A1L36_p1_out = PP[6] & PSel[0] & !PSel[1];
A1L36_p2_out = A1L36 & !PSel[0];
A1L36_p3_out = PP[6] & A1L36;
A1L36_p4_out = A1L36 & PSel[1];
A1L36_or_out = A1L36_p1_out # A1L36_p2_out # A1L36_p3_out # A1L36_p4_out;
A1L36 = A1L36_or_out;


--A1L26 is SB[5]~74 at LC99
A1L26_p1_out = PP[5] & PSel[0] & !PSel[1];
A1L26_p2_out = A1L26 & !PSel[0];
A1L26_p3_out = PP[5] & A1L26;
A1L26_p4_out = A1L26 & PSel[1];
A1L26_or_out = A1L26_p1_out # A1L26_p2_out # A1L26_p3_out # A1L26_p4_out;
A1L26 = A1L26_or_out;


--A1L16 is SB[4]~78 at LC101
A1L16_p1_out = PP[4] & PSel[0] & !PSel[1];
A1L16_p2_out = A1L16 & !PSel[0];
A1L16_p3_out = PP[4] & A1L16;
A1L16_p4_out = A1L16 & PSel[1];
A1L16_or_out = A1L16_p1_out # A1L16_p2_out # A1L16_p3_out # A1L16_p4_out;
A1L16 = A1L16_or_out;


--A1L06 is SB[3]~82 at LC104
A1L06_p1_out = PP[3] & PSel[0] & !PSel[1];
A1L06_p2_out = A1L06 & !PSel[0];
A1L06_p3_out = PP[3] & A1L06;
A1L06_p4_out = A1L06 & PSel[1];
A1L06_or_out = A1L06_p1_out # A1L06_p2_out # A1L06_p3_out # A1L06_p4_out;
A1L06 = A1L06_or_out;


--A1L95 is SB[2]~86 at LC105
A1L95_p1_out = PP[2] & PSel[0] & !PSel[1];
A1L95_p2_out = A1L95 & !PSel[0];
A1L95_p3_out = PP[2] & A1L95;
A1L95_p4_out = A1L95 & PSel[1];
A1L95_or_out = A1L95_p1_out # A1L95_p2_out # A1L95_p3_out # A1L95_p4_out;
A1L95 = A1L95_or_out;


--A1L85 is SB[1]~90 at LC107
A1L85_p1_out = PP[1] & PSel[0] & !PSel[1];
A1L85_p2_out = A1L85 & !PSel[0];
A1L85_p3_out = PP[1] & A1L85;
A1L85_p4_out = A1L85 & PSel[1];
A1L85_or_out = A1L85_p1_out # A1L85_p2_out # A1L85_p3_out # A1L85_p4_out;
A1L85 = A1L85_or_out;


--A1L75 is SB[0]~94 at LC109
A1L75_p1_out = PP[0] & PSel[0] & !PSel[1];
A1L75_p2_out = A1L75 & !PSel[0];
A1L75_p3_out = PP[0] & A1L75;
A1L75_p4_out = A1L75 & PSel[1];
A1L75_or_out = A1L75_p1_out # A1L75_p2_out # A1L75_p3_out # A1L75_p4_out;
A1L75 = A1L75_or_out;


--A1L27 is SC[7]~66 at LC80
A1L27_p1_out = PP[7] & !PSel[0] & PSel[1];
A1L27_p2_out = A1L27 & PSel[0];
A1L27_p3_out = PP[7] & A1L27;
A1L27_p4_out = A1L27 & !PSel[1];
A1L27_or_out = A1L27_p1_out # A1L27_p2_out # A1L27_p3_out # A1L27_p4_out;
A1L27 = A1L27_or_out;


--A1L17 is SC[6]~70 at LC77
A1L17_p1_out = PP[6] & !PSel[0] & PSel[1];
A1L17_p2_out = A1L17 & PSel[0];
A1L17_p3_out = PP[6] & A1L17;
A1L17_p4_out = A1L17 & !PSel[1];
A1L17_or_out = A1L17_p1_out # A1L17_p2_out # A1L17_p3_out # A1L17_p4_out;
A1L17 = A1L17_or_out;


--A1L07 is SC[5]~74 at LC75
A1L07_p1_out = PP[5] & !PSel[0] & PSel[1];
A1L07_p2_out = A1L07 & PSel[0];
A1L07_p3_out = PP[5] & A1L07;
A1L07_p4_out = A1L07 & !PSel[1];
A1L07_or_out = A1L07_p1_out # A1L07_p2_out # A1L07_p3_out # A1L07_p4_out;
A1L07 = A1L07_or_out;


--A1L96 is SC[4]~78 at LC73
A1L96_p1_out = PP[4] & !PSel[0] & PSel[1];
A1L96_p2_out = A1L96 & PSel[0];
A1L96_p3_out = PP[4] & A1L96;
A1L96_p4_out = A1L96 & !PSel[1];
A1L96_or_out = A1L96_p1_out # A1L96_p2_out # A1L96_p3_out # A1L96_p4_out;
A1L96 = A1L96_or_out;


--A1L86 is SC[3]~82 at LC72
A1L86_p1_out = PP[3] & !PSel[0] & PSel[1];
A1L86_p2_out = A1L86 & PSel[0];
A1L86_p3_out = PP[3] & A1L86;
A1L86_p4_out = A1L86 & !PSel[1];
A1L86_or_out = A1L86_p1_out # A1L86_p2_out # A1L86_p3_out # A1L86_p4_out;
A1L86 = A1L86_or_out;


--A1L76 is SC[2]~86 at LC69
A1L76_p1_out = PP[2] & !PSel[0] & PSel[1];
A1L76_p2_out = A1L76 & PSel[0];
A1L76_p3_out = PP[2] & A1L76;
A1L76_p4_out = A1L76 & !PSel[1];
A1L76_or_out = A1L76_p1_out # A1L76_p2_out # A1L76_p3_out # A1L76_p4_out;
A1L76 = A1L76_or_out;


--A1L66 is SC[1]~90 at LC67
A1L66_p1_out = PP[1] & !PSel[0] & PSel[1];
A1L66_p2_out = A1L66 & PSel[0];
A1L66_p3_out = PP[1] & A1L66;
A1L66_p4_out = A1L66 & !PSel[1];
A1L66_or_out = A1L66_p1_out # A1L66_p2_out # A1L66_p3_out # A1L66_p4_out;
A1L66 = A1L66_or_out;


--A1L56 is SC[0]~94 at LC65
A1L56_p1_out = PP[0] & !PSel[0] & PSel[1];
A1L56_p2_out = A1L56 & PSel[0];
A1L56_p3_out = PP[0] & A1L56;
A1L56_p4_out = A1L56 & !PSel[1];
A1L56_or_out = A1L56_p1_out # A1L56_p2_out # A1L56_p3_out # A1L56_p4_out;
A1L56 = A1L56_or_out;


--A1L08 is SD[7]~66 at LC49
A1L08_p1_out = PP[7] & PSel[0] & PSel[1];
A1L08_p2_out = A1L08 & !PSel[0];
A1L08_p3_out = PP[7] & A1L08;
A1L08_p4_out = A1L08 & !PSel[1];
A1L08_or_out = A1L08_p1_out # A1L08_p2_out # A1L08_p3_out # A1L08_p4_out;
A1L08 = A1L08_or_out;


--A1L97 is SD[6]~70 at LC51
A1L97_p1_out = PP[6] & PSel[0] & PSel[1];
A1L97_p2_out = A1L97 & !PSel[0];
A1L97_p3_out = PP[6] & A1L97;
A1L97_p4_out = A1L97 & !PSel[1];
A1L97_or_out = A1L97_p1_out # A1L97_p2_out # A1L97_p3_out # A1L97_p4_out;
A1L97 = A1L97_or_out;


--A1L87 is SD[5]~74 at LC53
A1L87_p1_out = PP[5] & PSel[0] & PSel[1];
A1L87_p2_out = A1L87 & !PSel[0];
A1L87_p3_out = PP[5] & A1L87;
A1L87_p4_out = A1L87 & !PSel[1];
A1L87_or_out = A1L87_p1_out # A1L87_p2_out # A1L87_p3_out # A1L87_p4_out;
A1L87 = A1L87_or_out;


--A1L77 is SD[4]~78 at LC56
A1L77_p1_out = PP[4] & PSel[0] & PSel[1];
A1L77_p2_out = A1L77 & !PSel[0];
A1L77_p3_out = PP[4] & A1L77;
A1L77_p4_out = A1L77 & !PSel[1];
A1L77_or_out = A1L77_p1_out # A1L77_p2_out # A1L77_p3_out # A1L77_p4_out;
A1L77 = A1L77_or_out;


--A1L67 is SD[3]~82 at LC57
A1L67_p1_out = PP[3] & PSel[0] & PSel[1];
A1L67_p2_out = A1L67 & !PSel[0];
A1L67_p3_out = PP[3] & A1L67;
A1L67_p4_out = A1L67 & !PSel[1];
A1L67_or_out = A1L67_p1_out # A1L67_p2_out # A1L67_p3_out # A1L67_p4_out;
A1L67 = A1L67_or_out;


--A1L57 is SD[2]~86 at LC59
A1L57_p1_out = PP[2] & PSel[0] & PSel[1];
A1L57_p2_out = A1L57 & !PSel[0];
A1L57_p3_out = PP[2] & A1L57;
A1L57_p4_out = A1L57 & !PSel[1];
A1L57_or_out = A1L57_p1_out # A1L57_p2_out # A1L57_p3_out # A1L57_p4_out;
A1L57 = A1L57_or_out;


--A1L47 is SD[1]~90 at LC61
A1L47_p1_out = PP[1] & PSel[0] & PSel[1];
A1L47_p2_out = A1L47 & !PSel[0];
A1L47_p3_out = PP[1] & A1L47;
A1L47_p4_out = A1L47 & !PSel[1];
A1L47_or_out = A1L47_p1_out # A1L47_p2_out # A1L47_p3_out # A1L47_p4_out;
A1L47 = A1L47_or_out;


--A1L37 is SD[0]~94 at LC64
A1L37_p1_out = PP[0] & PSel[0] & PSel[1];
A1L37_p2_out = A1L37 & !PSel[0];
A1L37_p3_out = PP[0] & A1L37;
A1L37_p4_out = A1L37 & !PSel[1];
A1L37_or_out = A1L37_p1_out # A1L37_p2_out # A1L37_p3_out # A1L37_p4_out;
A1L37 = A1L37_or_out;


--PP[7] is PP[7] at PIN_12
--operation mode is input

PP[7] = INPUT();


--PP[6] is PP[6] at PIN_11
--operation mode is input

PP[6] = INPUT();


--PP[5] is PP[5] at PIN_10
--operation mode is input

PP[5] = INPUT();


--PP[4] is PP[4] at PIN_9
--operation mode is input

PP[4] = INPUT();


--PP[3] is PP[3] at PIN_8
--operation mode is input

PP[3] = INPUT();


--PP[2] is PP[2] at PIN_6
--operation mode is input

PP[2] = INPUT();


--PP[1] is PP[1] at PIN_5
--operation mode is input

PP[1] = INPUT();


--PP[0] is PP[0] at PIN_4
--operation mode is input

PP[0] = INPUT();


--PSel[1] is PSel[1] at PIN_16
--operation mode is input

PSel[1] = INPUT();


--PSel[0] is PSel[0] at PIN_15
--operation mode is input

PSel[0] = INPUT();


--PA[7] is PA[7] at PIN_73
--operation mode is output

PA[7] = OUTPUT(A1L65);


--PA[6] is PA[6] at PIN_74
--operation mode is output

PA[6] = OUTPUT(A1L55);


--PA[5] is PA[5] at PIN_75
--operation mode is output

PA[5] = OUTPUT(A1L45);


--PA[4] is PA[4] at PIN_76
--operation mode is output

PA[4] = OUTPUT(A1L35);


--PA[3] is PA[3] at PIN_77
--operation mode is output

PA[3] = OUTPUT(A1L25);


--PA[2] is PA[2] at PIN_79
--operation mode is output

PA[2] = OUTPUT(A1L15);


--PA[1] is PA[1] at PIN_80
--operation mode is output

PA[1] = OUTPUT(A1L05);


--PA[0] is PA[0] at PIN_81
--operation mode is output

PA[0] = OUTPUT(A1L94);


--PB[7] is PB[7] at PIN_61
--operation mode is output

PB[7] = OUTPUT(A1L46);


--PB[6] is PB[6] at PIN_63
--operation mode is output

PB[6] = OUTPUT(A1L36);


--PB[5] is PB[5] at PIN_64
--operation mode is output

PB[5] = OUTPUT(A1L26);


--PB[4] is PB[4] at PIN_65
--operation mode is output

PB[4] = OUTPUT(A1L16);


--PB[3] is PB[3] at PIN_67
--operation mode is output

PB[3] = OUTPUT(A1L06);


--PB[2] is PB[2] at PIN_68
--operation mode is output

PB[2] = OUTPUT(A1L95);


--PB[1] is PB[1] at PIN_69
--operation mode is output

PB[1] = OUTPUT(A1L85);


--PB[0] is PB[0] at PIN_70
--operation mode is output

PB[0] = OUTPUT(A1L75);


--PC[7] is PC[7] at PIN_52
--operation mode is output

PC[7] = OUTPUT(A1L27);


--PC[6] is PC[6] at PIN_51
--operation mode is output

PC[6] = OUTPUT(A1L17);


--PC[5] is PC[5] at PIN_50
--operation mode is output

PC[5] = OUTPUT(A1L07);


--PC[4] is PC[4] at PIN_49
--operation mode is output

PC[4] = OUTPUT(A1L96);


--PC[3] is PC[3] at PIN_48
--operation mode is output

PC[3] = OUTPUT(A1L86);


--PC[2] is PC[2] at PIN_46
--operation mode is output

PC[2] = OUTPUT(A1L76);


--PC[1] is PC[1] at PIN_45
--operation mode is output

PC[1] = OUTPUT(A1L66);


--PC[0] is PC[0] at PIN_44
--operation mode is output

PC[0] = OUTPUT(A1L56);


--PD[7] is PD[7] at PIN_41
--operation mode is output

PD[7] = OUTPUT(A1L08);


--PD[6] is PD[6] at PIN_40
--operation mode is output

PD[6] = OUTPUT(A1L97);


--PD[5] is PD[5] at PIN_39
--operation mode is output

PD[5] = OUTPUT(A1L87);


--PD[4] is PD[4] at PIN_37
--operation mode is output

PD[4] = OUTPUT(A1L77);


--PD[3] is PD[3] at PIN_36
--operation mode is output

PD[3] = OUTPUT(A1L67);


--PD[2] is PD[2] at PIN_35
--operation mode is output

PD[2] = OUTPUT(A1L57);


--PD[1] is PD[1] at PIN_34
--operation mode is output

PD[1] = OUTPUT(A1L47);


--PD[0] is PD[0] at PIN_33
--operation mode is output

PD[0] = OUTPUT(A1L37);