////////////////////////////////////////////////////////////////////////////////// Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.//////////////////////////////////////////////////////////////////////////////////   ____  ____//  /   /\/   /// /___/  \  /    Vendor: Xilinx// \   \   \/     Version: H.42//  \   \         Application: netgen//  /   /         Filename: ICX229_timesim.v// /___/   /\     Timestamp: Sat Jan 19 16:44:59 2008// \   \  /  \ //  \___\/\___\//             // Command	: -intstyle ise -s 4 -pcf ICX229.pcf -sdf_anno true -w -ofmt verilog -sim ICX229.ncd ICX229_timesim.v // Device	: 3s400pq208-4 (PRODUCTION 1.37 2005-07-22)// Input file	: ICX229.ncd// Output file	: ICX229_timesim.v// # of Modules	: 1// Design Name	: ICX229// Xilinx	: D:/Xilinx//             // Purpose:    //     This verilog netlist is a verification model and uses simulation //     primitives which may not represent the true implementation of the //     device, however the netlist is functionally correct and should not //     be modified. This file cannot be synthesized and should only be used //     with supported simulation tools.//             // Reference:  //     Development System Reference Guide, Chapter 23//     Synthesis and Verification Design Guide, Chapter 6//             ////////////////////////////////////////////////////////////////////////////////`timescale 1 ns/1 psmodule ICX229 (  clk, rst, h1, h2, sub, r, v1, v2, v3, v4, v1h, v3h);  input clk;  input rst;  output h1;  output h2;  output sub;  output r;  output v1;  output v2;  output v3;  output v4;  output v1h;  output v3h;  wire GLOBAL_LOGIC0;  wire \l<0> ;  wire \l<1> ;  wire \_n0160<1> ;  wire \ICX229__n0160<1>_cyo ;  wire \l<2> ;  wire \l<3> ;  wire \_n0160<2> ;  wire \_n0160<3> ;  wire \ICX229__n0160<3>_cyo ;  wire \l<4> ;  wire \l<5> ;  wire \_n0160<4> ;  wire \_n0160<5> ;  wire \ICX229__n0160<5>_cyo ;  wire \l<6> ;  wire \l<7> ;  wire \_n0160<6> ;  wire \_n0160<7> ;  wire \ICX229__n0160<7>_cyo ;  wire \l<8> ;  wire \l<9> ;  wire \_n0160<8> ;  wire \_n0160<9> ;  wire \ICX229__n0160<9>_cyo ;  wire \l<10> ;  wire \l<11> ;  wire \_n0160<10> ;  wire \_n0160<11> ;  wire \ICX229__n0160<11>_cyo ;  wire \l<12> ;  wire \l<13> ;  wire \_n0160<12> ;  wire \_n0160<13> ;  wire \l<14> ;  wire \_n0160<14> ;  wire \o<0> ;  wire \o<1> ;  wire \_n0162<1> ;  wire \ICX229__n0162<1>_cyo ;  wire \o<2> ;  wire \o<3> ;  wire \_n0162<2> ;  wire \_n0162<3> ;  wire \ICX229__n0162<3>_cyo ;  wire \o<4> ;  wire \o<5> ;  wire \_n0162<4> ;  wire \_n0162<5> ;  wire \ICX229__n0162<5>_cyo ;  wire \o<6> ;  wire \o<7> ;  wire \_n0162<6> ;  wire \_n0162<7> ;  wire \ICX229__n0162<7>_cyo ;  wire \o<8> ;  wire \o<9> ;  wire \_n0162<8> ;  wire \_n0162<9> ;  wire \ICX229__n0162<9>_cyo ;  wire \o<10> ;  wire \o<11> ;  wire \_n0162<10> ;  wire \_n0162<11> ;  wire \ICX229__n0162<11>_cyo ;  wire \o<12> ;  wire \o<13> ;  wire \_n0162<12> ;  wire \_n0162<13> ;  wire \ICX229__n0162<13>_cyo ;  wire \o<14> ;  wire \o<15> ;  wire \_n0162<14> ;  wire \_n0162<15> ;  wire \ICX229__n0162<15>_cyo ;  wire \o<16> ;  wire \o<17> ;  wire \_n0162<16> ;  wire \_n0162<17> ;  wire \ICX229__n0162<17>_cyo ;  wire \o<18> ;  wire \o<19> ;  wire \_n0162<18> ;  wire \_n0162<19> ;  wire \ICX229__n0162<19>_cyo ;  wire \o<20> ;  wire \o<21> ;  wire \_n0162<20> ;  wire \_n0162<21> ;  wire \ICX229__n0162<21>_cyo ;  wire \o<22> ;  wire \o<23> ;  wire \_n0162<22> ;  wire \_n0162<23> ;  wire \ICX229__n0162<23>_cyo ;  wire \o<24> ;  wire \o<25> ;  wire \_n0162<24> ;  wire \_n0162<25> ;  wire \ICX229__n0162<25>_cyo ;  wire \o<26> ;  wire \o<27> ;  wire \_n0162<26> ;  wire \_n0162<27> ;  wire \ICX229__n0162<27>_cyo ;  wire \o<28> ;  wire \o<29> ;  wire \_n0162<28> ;  wire \_n0162<29> ;  wire \o<30> ;  wire \_n0162<30> ;  wire \a<0> ;  wire \a<1> ;  wire \_n0154<1> ;  wire \ICX229__n0154<1>_cyo ;  wire \a<2> ;  wire \a<3> ;  wire \_n0154<2> ;  wire \_n0154<3> ;  wire \ICX229__n0154<3>_cyo ;  wire \a<4> ;  wire \a<5> ;  wire \_n0154<4> ;  wire \_n0154<5> ;  wire \ICX229__n0154<5>_cyo ;  wire \a<6> ;  wire \a<7> ;  wire \_n0154<6> ;  wire \_n0154<7> ;  wire \ICX229__n0154<7>_cyo ;  wire \a<8> ;  wire \a<9> ;  wire \_n0154<8> ;  wire \_n0154<9> ;  wire \ICX229__n0154<9>_cyo ;  wire \a<10> ;  wire \a<11> ;  wire \_n0154<10> ;  wire \_n0154<11> ;  wire \ICX229__n0154<11>_cyo ;  wire \a<12> ;  wire \a<13> ;  wire \_n0154<12> ;  wire \_n0154<13> ;  wire \a<14> ;  wire \_n0154<14> ;  wire \j<0> ;  wire \j<1> ;  wire \_n0152<1> ;  wire \ICX229__n0152<1>_cyo ;  wire \j<2> ;  wire \j<3> ;  wire \_n0152<2> ;  wire \_n0152<3> ;  wire \ICX229__n0152<3>_cyo ;  wire \j<4> ;  wire \j<5> ;  wire \_n0152<4> ;  wire \_n0152<5> ;  wire \ICX229__n0152<5>_cyo ;  wire \j<6> ;  wire \j<7> ;  wire \_n0152<6> ;  wire \_n0152<7> ;  wire \ICX229__n0152<7>_cyo ;  wire \j<8> ;  wire \j<9> ;  wire \_n0152<8> ;  wire \_n0152<9> ;  wire \ICX229__n0152<9>_cyo ;  wire \j<10> ;  wire \j<11> ;  wire \_n0152<10> ;  wire \_n0152<11> ;  wire \ICX229__n0152<11>_cyo ;  wire \j<12> ;  wire \j<13> ;  wire \_n0152<12> ;  wire \_n0152<13> ;  wire \j<14> ;  wire \_n0152<14> ;  wire \m<0> ;  wire \m<1> ;  wire \_n0161<1> ;  wire \ICX229__n0161<1>_cyo ;  wire \m<2> ;  wire \m<3> ;  wire \_n0161<2> ;  wire \_n0161<3> ;  wire \ICX229__n0161<3>_cyo ;  wire \m<4> ;  wire \m<5> ;  wire \_n0161<4> ;  wire \_n0161<5> ;  wire \ICX229__n0161<5>_cyo ;  wire \m<6> ;  wire \m<7> ;  wire \_n0161<6> ;  wire \_n0161<7> ;  wire \ICX229__n0161<7>_cyo ;  wire \m<8> ;  wire \m<9> ;  wire \_n0161<8> ;  wire \_n0161<9> ;  wire \ICX229__n0161<9>_cyo ;  wire \m<10> ;  wire \m<11> ;  wire \_n0161<10> ;  wire \_n0161<11> ;  wire \ICX229__n0161<11>_cyo ;  wire \m<12> ;  wire \m<13> ;  wire \_n0161<12> ;  wire \_n0161<13> ;  wire \m<14> ;  wire \_n0161<14> ;  wire \p<0> ;  wire \p<1> ;  wire \_n0163<1> ;  wire \ICX229__n0163<1>_cyo ;  wire \p<2> ;  wire \p<3> ;  wire \_n0163<2> ;  wire \_n0163<3> ;  wire \ICX229__n0163<3>_cyo ;  wire \p<4> ;  wire \p<5> ;  wire \_n0163<4> ;  wire \_n0163<5> ;  wire \ICX229__n0163<5>_cyo ;  wire \p<6> ;  wire \p<7> ;  wire \_n0163<6> ;  wire \_n0163<7> ;  wire \ICX229__n0163<7>_cyo ;  wire \p<8> ;  wire \p<9> ;  wire \_n0163<8> ;  wire \_n0163<9> ;  wire \ICX229__n0163<9>_cyo ;  wire \p<10> ;  wire \p<11> ;  wire \_n0163<10> ;  wire \_n0163<11> ;  wire \ICX229__n0163<11>_cyo ;  wire \p<12> ;  wire \p<13> ;  wire \_n0163<12> ;  wire \_n0163<13> ;  wire \ICX229__n0163<13>_cyo ;  wire \p<14> ;  wire \p<15> ;  wire \_n0163<14> ;  wire \_n0163<15> ;  wire \ICX229__n0163<15>_cyo ;  wire \p<16> ;  wire \p<17> ;  wire \_n0163<16> ;  wire \_n0163<17> ;  wire \ICX229__n0163<17>_cyo ;  wire \p<18> ;  wire \p<19> ;  wire \_n0163<18> ;  wire \_n0163<19> ;  wire \ICX229__n0163<19>_cyo ;  wire \p<20> ;  wire \p<21> ;  wire \_n0163<20> ;  wire \_n0163<21> ;  wire \ICX229__n0163<21>_cyo ;  wire \p<22> ;  wire \p<23> ;  wire \_n0163<22> ;  wire \_n0163<23> ;  wire \ICX229__n0163<23>_cyo ;  wire \p<24> ;  wire \p<25> ;  wire \_n0163<24> ;  wire \_n0163<25> ;  wire \ICX229__n0163<25>_cyo ;  wire \p<26> ;  wire \p<27> ;  wire \_n0163<26> ;  wire \_n0163<27> ;  wire \ICX229__n0163<27>_cyo ;  wire \p<28> ;  wire \p<29> ;  wire \_n0163<28> ;  wire \_n0163<29> ;  wire \p<30> ;  wire \_n0163<30> ;  wire \b<0> ;  wire \b<1> ;  wire \_n0155<1> ;  wire \ICX229__n0155<1>_cyo ;  wire \b<2> ;  wire \b<3> ;  wire \_n0155<2> ;  wire \_n0155<3> ;  wire \ICX229__n0155<3>_cyo ;  wire \b<4> ;  wire \b<5> ;  wire \_n0155<4> ;  wire \_n0155<5> ;  wire \ICX229__n0155<5>_cyo ;  wire \b<6> ;  wire \b<7> ;  wire \_n0155<6> ;  wire \_n0155<7> ;  wire \ICX229__n0155<7>_cyo ;  wire \b<8> ;  wire \b<9> ;  wire \_n0155<8> ;  wire \_n0155<9> ;  wire \ICX229__n0155<9>_cyo ;  wire \b<10> ;  wire \b<11> ;  wire \_n0155<10> ;  wire \_n0155<11> ;  wire \ICX229__n0155<11>_cyo ;  wire \b<12> ;  wire \b<13> ;  wire \_n0155<12> ;  wire \_n0155<13> ;  wire \b<14> ;  wire \_n0155<14> ;  wire \q<0> ;  wire \q<1> ;  wire \_n0164<1> ;  wire \ICX229__n0164<1>_cyo ;  wire \q<2> ;  wire \q<3> ;  wire \_n0164<2> ;  wire \_n0164<3> ;  wire \ICX229__n0164<3>_cyo ;  wire \q<4> ;  wire \q<5> ;  wire \_n0164<4> ;  wire \_n0164<5> ;  wire \ICX229__n0164<5>_cyo ;  wire \q<6> ;  wire \q<7> ;  wire \_n0164<6> ;  wire \_n0164<7> ;  wire \ICX229__n0164<7>_cyo ;  wire \q<8> ;  wire \q<9> ;  wire \_n0164<8> ;  wire \_n0164<9> ;  wire \ICX229__n0164<9>_cyo ;  wire \q<10> ;  wire \q<11> ;  wire \_n0164<10> ;  wire \_n0164<11> ;  wire \ICX229__n0164<11>_cyo ;  wire \q<12> ;  wire \q<13> ;  wire \_n0164<12> ;  wire \_n0164<13> ;  wire \ICX229__n0164<13>_cyo ;  wire \q<14> ;  wire \q<15> ;  wire \_n0164<14> ;  wire \_n0164<15> ;  wire \ICX229__n0164<15>_cyo ;  wire \q<16> ;  wire \q<17> ;  wire \_n0164<16> ;  wire \_n0164<17> ;  wire \ICX229__n0164<17>_cyo ;  wire \q<18> ;  wire \q<19> ;  wire \_n0164<18> ;  wire \_n0164<19> ;  wire \ICX229__n0164<19>_cyo ;  wire \q<20> ;  wire \q<21> ;  wire \_n0164<20> ;  wire \_n0164<21> ;  wire \ICX229__n0164<21>_cyo ;  wire \q<22> ;  wire \q<23> ;  wire \_n0164<22> ;  wire \_n0164<23> ;  wire \ICX229__n0164<23>_cyo ;  wire \q<24> ;  wire \q<25> ;  wire \_n0164<24> ;  wire \_n0164<25> ;  wire \ICX229__n0164<25>_cyo ;  wire \q<26> ;  wire \q<27> ;  wire \_n0164<26> ;  wire \_n0164<27> ;  wire \ICX229__n0164<27>_cyo ;  wire \q<28> ;  wire \q<29> ;  wire \_n0164<28> ;  wire \_n0164<29> ;  wire \q<30> ;  wire \_n0164<30> ;  wire \d<0> ;  wire \d<1> ;  wire \_n0156<1> ;  wire \ICX229__n0156<1>_cyo ;  wire \d<2> ;  wire \d<3> ;  wire \_n0156<2> ;  wire \_n0156<3> ;  wire \ICX229__n0156<3>_cyo ;  wire \d<4> ;  wire \d<5> ;  wire \_n0156<4> ;  wire \_n0156<5> ;  wire \ICX229__n0156<5>_cyo ;  wire \d<6> ;  wire \d<7> ;  wire \_n0156<6> ;  wire \_n0156<7> ;  wire \ICX229__n0156<7>_cyo ;  wire \d<8> ;  wire \d<9> ;  wire \_n0156<8> ;  wire \_n0156<9> ;  wire \ICX229__n0156<9>_cyo ;  wire \d<10> ;  wire \d<11> ;  wire \_n0156<10> ;  wire \_n0156<11> ;  wire \ICX229__n0156<11>_cyo ;  wire \d<12> ;  wire \d<13> ;  wire \_n0156<12> ;  wire \_n0156<13> ;  wire \d<14> ;  wire \_n0156<14> ;  wire \i<0> ;  wire \i<1> ;  wire \_n0165<1> ;  wire \ICX229__n0165<1>_cyo ;  wire \i<2> ;  wire \i<3> ;  wire \_n0165<2> ;  wire \_n0165<3> ;  wire \ICX229__n0165<3>_cyo ;  wire \i<4> ;  wire \i<5> ;  wire \_n0165<4> ;  wire \_n0165<5> ;  wire \ICX229__n0165<5>_cyo ;  wire \i<6> ;  wire \i<7> ;  wire \_n0165<6> ;  wire \_n0165<7> ;  wire \ICX229__n0165<7>_cyo ;  wire \i<8> ;  wire \i<9> ;  wire \_n0165<8> ;  wire \_n0165<9> ;  wire \ICX229__n0165<9>_cyo ;  wire \i<10> ;  wire \i<11> ;  wire \_n0165<10> ;  wire \_n0165<11> ;  wire \ICX229__n0165<11>_cyo ;  wire \i<12> ;  wire \i<13> ;  wire \_n0165<12> ;  wire \_n0165<13> ;  wire \i<14> ;  wire \_n0165<14> ;  wire \e<0> ;  wire \e<1> ;  wire \_n0157<1> ;  wire \ICX229__n0157<1>_cyo ;  wire \e<2> ;  wire \e<3> ;  wire \_n0157<2> ;  wire \_n0157<3> ;  wire \ICX229__n0157<3>_cyo ;  wire \e<4> ;  wire \e<5> ;  wire \_n0157<4> ;  wire \_n0157<5> ;  wire \ICX229__n0157<5>_cyo ;  wire \e<6> ;  wire \e<7> ;  wire \_n0157<6> ;  wire \_n0157<7> ;  wire \ICX229__n0157<7>_cyo ;  wire \e<8> ;  wire \e<9> ;  wire \_n0157<8> ;  wire \_n0157<9> ;  wire \ICX229__n0157<9>_cyo ;  wire \e<10> ;  wire \e<11> ;