?? viterbi_ber_inst.vhd
字號:
-- Generated by Viterbi Compiler 4.1.0 [Altera, IP Toolbench v1.2.5 build28]
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
-- ************************************************************
-- Copyright (C) 1991-2004 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
viterbi_BER_inst : viterbi_BER
PORT MAP (
clk => clk_sig,
reset => reset_sig,
sink_dav_master => sink_dav_master_sig,
source_ena_slave => source_ena_slave_sig,
sink_val => sink_val_sig,
sink_sop => sink_sop_sig,
sink_eop => sink_eop_sig,
rr => rr_sig,
eras_sym => eras_sym_sig,
tr_init_state => tr_init_state_sig,
tb_type => tb_type_sig,
tb_length => tb_length_sig,
sink_ena_master => sink_ena_master_sig,
source_dav_slave => source_dav_slave_sig,
source_val => source_val_sig,
source_sop => source_sop_sig,
source_eop => source_eop_sig,
decbit => decbit_sig,
normalizations => normalizations_sig,
bestadd => bestadd_sig,
bestmet => bestmet_sig,
numerr => numerr_sig
);
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