?? colorbar_v.sdo
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// Copyright (C) 1991-2005 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Altera Program License
// Subscription Agreement, Altera MegaCore Function License
// Agreement, or other applicable license agreement, including,
// without limitation, that your use is for the sole purpose of
// programming logic devices manufactured by Altera and sold by
// Altera or its authorized distributors. Please refer to the
// applicable agreement for further details.
//
// Device: Altera EP2C20F484C8 Package FBGA484
//
//
// This SDF file should be used for ModelSim (Verilog) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "ColorBar")
(DATE "02/09/2007 20:28:23")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE inst\|LessThan\~1883_I)
(DELAY
(ABSOLUTE
(PORT dataa (1181:1181:1181) (1612:1612:1612))
(PORT datab (921:921:921) (1229:1229:1229))
(PORT datac (482:482:482) (696:696:696))
(PORT datad (1192:1192:1192) (1599:1599:1599))
(IOPATH dataa combout (664:664:664) (664:664:664))
(IOPATH datab combout (636:636:636) (636:636:636))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE inst\|vcnt\[5\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1754:1754:1754) (1746:1746:1746))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (7245:7245:7245) (7899:7899:7899))
(PORT sclr (974:974:974) (1036:1036:1036))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD sclr (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE inst\|vcnt\[0\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1754:1754:1754) (1746:1746:1746))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (7245:7245:7245) (7899:7899:7899))
(PORT sclr (974:974:974) (1036:1036:1036))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD sclr (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE inst\|always4\~156_I)
(DELAY
(ABSOLUTE
(PORT datac (372:372:372) (456:456:456))
(PORT datad (371:371:371) (462:462:462))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE inst\|always4\~158_I)
(DELAY
(ABSOLUTE
(PORT dataa (471:471:471) (705:705:705))
(PORT datab (469:469:469) (693:693:693))
(PORT datac (442:442:442) (659:659:659))
(PORT datad (528:528:528) (668:668:668))
(IOPATH dataa combout (664:664:664) (664:664:664))
(IOPATH datab combout (636:636:636) (636:636:636))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE inst\|vcnt\[0\]\~243_I)
(DELAY
(ABSOLUTE
(PORT dataa (347:347:347) (462:462:462))
(IOPATH dataa combout (664:664:664) (664:664:664))
(IOPATH dataa cout (626:626:626) (626:626:626))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE inst\|vcnt\[5\]\~253_I)
(DELAY
(ABSOLUTE
(PORT dataa (381:381:381) (489:489:489))
(IOPATH dataa combout (664:664:664) (664:664:664))
(IOPATH dataa cout (626:626:626) (626:626:626))
(IOPATH datad combout (210:210:210) (210:210:210))
(IOPATH cin combout (516:516:516) (516:516:516))
(IOPATH cin cout (62:62:62) (62:62:62))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\[0\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1751:1751:1751) (1746:1746:1746))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1750:1750:1750) (1744:1744:1744))
(PORT ena (1736:1736:1736) (1989:1989:1989))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE sld_hub_inst\|instruction_decoder\|auto_generated\|dffe1a\[0\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1764:1764:1764) (1757:1757:1757))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1763:1763:1763) (1755:1755:1755))
(PORT ena (1138:1138:1138) (1201:1201:1201))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\[1\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1751:1751:1751) (1746:1746:1746))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1750:1750:1750) (1744:1744:1744))
(PORT ena (1736:1736:1736) (1989:1989:1989))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[0\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1750:1750:1750) (1746:1746:1746))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (2289:2289:2289) (2214:2214:2214))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[2\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1758:1758:1758) (1750:1750:1750))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1757:1757:1757) (1748:1748:1748))
(PORT ena (1138:1138:1138) (1204:1204:1204))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[3\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1758:1758:1758) (1750:1750:1750))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1757:1757:1757) (1748:1748:1748))
(PORT ena (1372:1372:1372) (1549:1549:1549))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[1\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1758:1758:1758) (1750:1750:1750))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1757:1757:1757) (1748:1748:1748))
(PORT ena (1589:1589:1589) (1885:1885:1885))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\~426_I)
(DELAY
(ABSOLUTE
(PORT dataa (598:598:598) (832:832:832))
(PORT datab (602:602:602) (731:731:731))
(PORT datac (359:359:359) (446:446:446))
(PORT datad (347:347:347) (442:442:442))
(IOPATH dataa combout (664:664:664) (664:664:664))
(IOPATH datab combout (636:636:636) (636:636:636))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\~427_I)
(DELAY
(ABSOLUTE
(PORT datab (929:929:929) (1227:1227:1227))
(PORT datac (1563:1563:1563) (2204:2204:2204))
(PORT datad (341:341:341) (437:437:437))
(IOPATH datab combout (636:636:636) (636:636:636))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE auto_signaltap_0\|comb\~26_I)
(DELAY
(ABSOLUTE
(PORT datab (869:869:869) (1178:1178:1178))
(PORT datac (576:576:576) (769:769:769))
(PORT datad (1223:1223:1223) (1573:1573:1573))
(IOPATH datab combout (636:636:636) (636:636:636))
(IOPATH datac combout (378:378:378) (378:378:378))
(IOPATH datad combout (210:210:210) (210:210:210))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE auto_signaltap_0\|ela_control\|sm2\|status_out\[0\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1745:1745:1745) (1735:1735:1735))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1750:1750:1750) (1740:1740:1740))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE sld_hub_inst\|HUB_INFO_REG\|word_counter\[1\]\~I)
(DELAY
(ABSOLUTE
(PORT clk (1764:1764:1764) (1757:1757:1757))
(PORT datain (110:110:110) (110:110:110))
(PORT aclr (1763:1763:1763) (1755:1755:1755))
(PORT ena (1631:1631:1631) (1914:1914:1914))
(IOPATH (posedge clk) regout (310:310:310) (310:310:310))
(IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (211:211:211))
(HOLD ena (posedge clk) (211:211:211))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE sld_hub_inst\|HUB_INFO_REG\|WORD_SR\~249_I)
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