?? colorbar_v.sdo

?? VGA顯示接口的verilog控制程序。用于VGA顯示器的控制驅動
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    (DELAY
      (ABSOLUTE
        (PORT dataa (418:418:418) (518:518:518))
        (PORT datab (387:387:387) (483:483:483))
        (PORT datac (377:377:377) (460:460:460))
        (PORT datad (403:403:403) (489:489:489))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH datab combout (636:636:636) (636:636:636))
        (IOPATH datac combout (378:378:378) (378:378:378))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE sld_hub_inst\|instruction_decoder\|auto_generated\|w_anode1w\[3\]\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1226:1226:1226) (1450:1450:1450))
        (PORT datab (306:306:306) (405:405:405))
        (PORT datac (1167:1167:1167) (1381:1381:1381))
        (PORT datad (1259:1259:1259) (1642:1642:1642))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH datab combout (636:636:636) (636:636:636))
        (IOPATH datac combout (378:378:378) (378:378:378))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|ela_control\|\\basic_multi_level_mbpm_trigger_gen\:multi_level_mbpm\|\\trigger_modules_gen\:0\:trigger_match\|\\gen_sbpmg_pipeline_less_than_two\:sm0\:0\:sm1\|match_out\~I)
    (DELAY
      (ABSOLUTE
        (PORT clk (1750:1750:1750) (1738:1738:1738))
        (PORT datain (110:110:110) (110:110:110))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|ela_control\|\\basic_multi_level_mbpm_trigger_gen\:multi_level_mbpm\|\\trigger_modules_gen\:0\:trigger_match\|\\gen_sbpmg_pipeline_less_than_two\:sm0\:2\:sm1\|match_out\~I)
    (DELAY
      (ABSOLUTE
        (PORT clk (1752:1752:1752) (1744:1744:1744))
        (PORT datain (110:110:110) (110:110:110))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|ela_control\|ela_level_seq_mgr\|trigger_happened_ff\[1\]\~I)
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1734:1734:1734))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1742:1742:1742))
        (PORT ena (1152:1152:1152) (1215:1215:1215))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[10\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[8\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[6\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[4\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[3\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_reg_bit1a\[1\])
    (DELAY
      (ABSOLUTE
        (PORT clk (1743:1743:1743) (1735:1735:1735))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1748:1748:1748) (1740:1740:1740))
        (PORT ena (1140:1140:1140) (1205:1205:1205))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita1\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (362:362:362) (475:475:475))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita3\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (362:362:362) (477:477:477))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita4\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (353:353:353) (467:467:467))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita6\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (360:360:360) (474:474:474))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita8\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (352:352:352) (466:466:466))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|sld_acquisition_buffer_inst\|\\write_address_non_zero_gen\:write_pointer_counter\|auto_generated\|counter_comb_bita10\~I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (353:353:353) (465:465:465))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH dataa cout (626:626:626) (626:626:626))
        (IOPATH datad combout (210:210:210) (210:210:210))
        (IOPATH cin combout (516:516:516) (516:516:516))
        (IOPATH cin cout (62:62:62) (62:62:62))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\[2\]\~I)
    (DELAY
      (ABSOLUTE
        (PORT clk (1751:1751:1751) (1746:1746:1746))
        (PORT datain (110:110:110) (110:110:110))
        (PORT aclr (1750:1750:1750) (1744:1744:1744))
        (PORT ena (1736:1736:1736) (1989:1989:1989))
        (IOPATH (posedge clk) regout (310:310:310) (310:310:310))
        (IOPATH (posedge aclr) regout (273:273:273) (273:273:273))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (211:211:211))
      (HOLD ena (posedge clk) (211:211:211))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|WORD_SR\~428_I)
    (DELAY
      (ABSOLUTE
        (PORT datab (1582:1582:1582) (2228:2228:2228))
        (PORT datac (915:915:915) (1203:1203:1203))
        (PORT datad (329:329:329) (426:426:426))
        (IOPATH datab combout (636:636:636) (636:636:636))
        (IOPATH datac combout (378:378:378) (378:378:378))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|reduce_nor\~3_I)
    (DELAY
      (ABSOLUTE
        (PORT datac (582:582:582) (793:793:793))
        (PORT datad (347:347:347) (443:443:443))
        (IOPATH datac combout (378:378:378) (378:378:378))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[0\]\~6_I)
    (DELAY
      (ABSOLUTE
        (PORT datab (2224:2224:2224) (2773:2773:2773))
        (PORT datac (2036:2036:2036) (2742:2742:2742))
        (PORT datad (1831:1831:1831) (2297:2297:2297))
        (IOPATH datab combout (636:636:636) (636:636:636))
        (IOPATH datac combout (378:378:378) (378:378:378))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[0\]\~209_I)
    (DELAY
      (ABSOLUTE
        (PORT dataa (281:281:281) (395:395:395))
        (PORT datab (509:509:509) (726:726:726))
        (PORT datad (558:558:558) (771:771:771))
        (IOPATH dataa combout (664:664:664) (664:664:664))
        (IOPATH datab combout (636:636:636) (636:636:636))
        (IOPATH datac combout (401:401:401) (401:401:401))
        (IOPATH datad combout (210:210:210) (210:210:210))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE auto_signaltap_0\|crc_rom_sr\|word_counter\[2\]\~210_I)
    (DELAY
?? 文件大小 1102 K
?? 上傳用戶 dtlyzx
?? 所屬分類 VHDL/FPGA/Verilog
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#VGA #verilog #顯示接口 #控制
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