?? coswave.fit.rpt
字號(hào):
+--------+----------+---------------+---------------+-----------------------+-----+
; Name ; Pin Type ; Pad to Core 0 ; Pad to Core 1 ; Pad to Input Register ; TCO ;
+--------+----------+---------------+---------------+-----------------------+-----+
; clock ; Input ; OFF ; OFF ; -- ; -- ;
; reset ; Input ; OFF ; OFF ; -- ; -- ;
; clk_en ; Input ; ON ; ON ; -- ; -- ;
; q[9] ; Output ; -- ; -- ; -- ; -- ;
; q[8] ; Output ; -- ; -- ; -- ; -- ;
; q[7] ; Output ; -- ; -- ; -- ; -- ;
; q[6] ; Output ; -- ; -- ; -- ; -- ;
; q[5] ; Output ; -- ; -- ; -- ; -- ;
; q[4] ; Output ; -- ; -- ; -- ; -- ;
; q[3] ; Output ; -- ; -- ; -- ; -- ;
; q[2] ; Output ; -- ; -- ; -- ; -- ;
; q[1] ; Output ; -- ; -- ; -- ; -- ;
; q[0] ; Output ; -- ; -- ; -- ; -- ;
+--------+----------+---------------+---------------+-----------------------+-----+
+---------------------------------------------------------------------------------------------------------------------------------+
; Pad To Core Delay Chain Fanout ;
+---------------------------------------------------------------------------------------------------+-------------------+---------+
; Source Pin / Fanout ; Pad To Core Index ; Setting ;
+---------------------------------------------------------------------------------------------------+-------------------+---------+
; clock ; ; ;
; reset ; ; ;
; clk_en ; ; ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella0 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella1 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella2 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella3 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella4 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella5 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella6 ; 1 ; ON ;
; - lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella7 ; 1 ; ON ;
+---------------------------------------------------------------------------------------------------+-------------------+---------+
+-----------------------------------------------------------------------------------------------+
; Control Signals ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
; clk_en ; PIN_107 ; 8 ; Clock enable ; no ; -- ; -- ;
; clock ; PIN_17 ; 9 ; Clock ; yes ; Global clock ; GCLK3 ;
; reset ; PIN_16 ; 8 ; Async. clear ; yes ; Global clock ; GCLK2 ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
+----------------------------------------------------------------------+
; Global & Other Fast Signals ;
+-------+----------+---------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+-------+----------+---------+----------------------+------------------+
; clock ; PIN_17 ; 9 ; Global clock ; GCLK3 ;
; reset ; PIN_16 ; 8 ; Global clock ; GCLK2 ;
+-------+----------+---------+----------------------+------------------+
+------------------------------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals ;
+--------------------------------------------------------------------------------------------------------+---------+
; Name ; Fan-Out ;
+--------------------------------------------------------------------------------------------------------+---------+
; clk_en ; 8 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella4~COUT ; 3 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[7] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[6] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[5] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[4] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[3] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[2] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[1] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|safe_q[0] ; 2 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella6~COUTCOUT1_1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella6~COUT ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella5~COUTCOUT1_1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella5~COUT ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella3~COUTCOUT1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella3~COUT ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella2~COUTCOUT1_1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella2~COUT ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella1~COUTCOUT1_1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella1~COUT ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella0~COUTCOUT1_1 ; 1 ;
; lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated|counter_cella0~COUT ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[8] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[7] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[6] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[5] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[4] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[3] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[2] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[1] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[0] ; 1 ;
; data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated|q_a[9] ; 1 ;
+--------------------------------------------------------------------------------------------------------+---------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter RAM Summary ;
+----------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+----------+-------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementatio
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