?? lcdcont.map.eqn
字號:
--C1L88 is lcd0:mylcd|Select~3601
--operation mode is normal
C1L88 = C1L78 # C1_state.setfunc # C1_lcd_data[5] & C1L71;
--C1L68 is lcd0:mylcd|Mux~1048
--operation mode is normal
C1L68 = C1_count[2] & (C1_count[1] & !C1_count[3]) # !C1_count[2] & C1_count[3] & (!C1_count[1] # !C1_count[0]);
--C1_state.add is lcd0:mylcd|state.add
--operation mode is normal
C1_state.add_lut_out = C1L107;
C1_state.add = DFFEAS(C1_state.add_lut_out, B1_clock_int, reset, , , , , , );
--C1_state.setadd is lcd0:mylcd|state.setadd
--operation mode is normal
C1_state.setadd_lut_out = C1_state.write2 & A1L14;
C1_state.setadd = DFFEAS(C1_state.setadd_lut_out, B1_clock_int, reset, , , , , , );
--C1L21 is lcd0:mylcd|count[2]~708
--operation mode is normal
C1L21 = !C1_state.add & !C1_state.setadd;
--C1_state.add2 is lcd0:mylcd|state.add2
--operation mode is normal
C1_state.add2_lut_out = !C1L92;
C1_state.add2 = DFFEAS(C1_state.add2_lut_out, B1_clock_int, reset, , , , , , );
--C1L89 is lcd0:mylcd|Select~3603
--operation mode is normal
C1L89 = C1_state.setadd # C1_state.add2;
--C1L90 is lcd0:mylcd|Select~3605
--operation mode is normal
C1L90 = C1_lcd_select & (C1_state.write3 # C1_state.write2) # !C1_lcd_select & !A1L14 & (C1_state.write3 # C1_state.write2);
--C1L91 is lcd0:mylcd|Select~3606
--operation mode is normal
C1L91 = C1_state.write1 # C1_state.clear # C1_state.setmode # !C1L86;
--B1_\count:counter[14] is clockdiv:div|\count:counter[14]
--operation mode is normal
B1_\count:counter[14]_lut_out = B1L16 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[14] = DFFEAS(B1_\count:counter[14]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[13] is clockdiv:div|\count:counter[13]
--operation mode is normal
B1_\count:counter[13]_lut_out = B1L17 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[13] = DFFEAS(B1_\count:counter[13]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[11] is clockdiv:div|\count:counter[11]
--operation mode is normal
B1_\count:counter[11]_lut_out = B1L19 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[11] = DFFEAS(B1_\count:counter[11]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[12] is clockdiv:div|\count:counter[12]
--operation mode is normal
B1_\count:counter[12]_lut_out = B1L21;
B1_\count:counter[12] = DFFEAS(B1_\count:counter[12]_lut_out, clk, VCC, , , , , , );
--A1L18 is rtl~218
--operation mode is normal
A1L18 = B1_\count:counter[14] & B1_\count:counter[13] & B1_\count:counter[11] & !B1_\count:counter[12];
--B1_\count:counter[10] is clockdiv:div|\count:counter[10]
--operation mode is normal
B1_\count:counter[10]_lut_out = B1L23;
B1_\count:counter[10] = DFFEAS(B1_\count:counter[10]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[9] is clockdiv:div|\count:counter[9]
--operation mode is normal
B1_\count:counter[9]_lut_out = B1L25;
B1_\count:counter[9] = DFFEAS(B1_\count:counter[9]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[8] is clockdiv:div|\count:counter[8]
--operation mode is normal
B1_\count:counter[8]_lut_out = B1L27;
B1_\count:counter[8] = DFFEAS(B1_\count:counter[8]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[7] is clockdiv:div|\count:counter[7]
--operation mode is normal
B1_\count:counter[7]_lut_out = B1L29;
B1_\count:counter[7] = DFFEAS(B1_\count:counter[7]_lut_out, clk, VCC, , , , , , );
--A1L19 is rtl~219
--operation mode is normal
A1L19 = !B1_\count:counter[10] & !B1_\count:counter[9] & !B1_\count:counter[8] & !B1_\count:counter[7];
--B1_\count:counter[5] is clockdiv:div|\count:counter[5]
--operation mode is normal
B1_\count:counter[5]_lut_out = B1L31 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[5] = DFFEAS(B1_\count:counter[5]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[3] is clockdiv:div|\count:counter[3]
--operation mode is normal
B1_\count:counter[3]_lut_out = B1L33 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[3] = DFFEAS(B1_\count:counter[3]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[6] is clockdiv:div|\count:counter[6]
--operation mode is normal
B1_\count:counter[6]_lut_out = B1L35;
B1_\count:counter[6] = DFFEAS(B1_\count:counter[6]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[4] is clockdiv:div|\count:counter[4]
--operation mode is normal
B1_\count:counter[4]_lut_out = B1L37;
B1_\count:counter[4] = DFFEAS(B1_\count:counter[4]_lut_out, clk, VCC, , , , , , );
--A1L20 is rtl~220
--operation mode is normal
A1L20 = B1_\count:counter[5] & B1_\count:counter[3] & !B1_\count:counter[6] & !B1_\count:counter[4];
--B1_\count:counter[1] is clockdiv:div|\count:counter[1]
--operation mode is normal
B1_\count:counter[1]_lut_out = B1L39 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[1] = DFFEAS(B1_\count:counter[1]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[2] is clockdiv:div|\count:counter[2]
--operation mode is normal
B1_\count:counter[2]_lut_out = B1L41;
B1_\count:counter[2] = DFFEAS(B1_\count:counter[2]_lut_out, clk, VCC, , , , , , );
--B1_\count:counter[0] is clockdiv:div|\count:counter[0]
--operation mode is normal
B1_\count:counter[0]_lut_out = B1L43 & (!A1L21 # !A1L19 # !A1L18);
B1_\count:counter[0] = DFFEAS(B1_\count:counter[0]_lut_out, clk, VCC, , , , , , );
--A1L21 is rtl~221
--operation mode is normal
A1L21 = A1L20 & B1_\count:counter[1] & !B1_\count:counter[2] & !B1_\count:counter[0];
--C1L16 is lcd0:mylcd|count1[6]~0
--operation mode is normal
C1L16 = C1_state.write1 & reset & (!A1L15);
--C1L22 is lcd0:mylcd|count[2]~709
--operation mode is normal
C1L22 = C1L21 & !C1_state.setmode & !C1_state.dispoff & !C1_state.add2;
--C1_state.warmup is lcd0:mylcd|state.warmup
--operation mode is normal
C1_state.warmup_lut_out = C1_state.warmup # A1L22 & (!C1_count[3]);
C1_state.warmup = DFFEAS(C1_state.warmup_lut_out, B1_clock_int, reset, , , , , , );
--C1L23 is lcd0:mylcd|count[2]~710
--operation mode is normal
C1L23 = C1_state.warmup & (!C1_state.write1 & !C1_state.home);
--A1L22 is rtl~222
--operation mode is normal
A1L22 = C1_count[2] & C1_count[0] & C1_count[1];
--C1L24 is lcd0:mylcd|count[2]~711
--operation mode is normal
C1L24 = C1_count[3] # C1_state.home # !A1L22;
--A1L23 is rtl~223
--operation mode is normal
A1L23 = C1_count[2] & (!C1_count[3] & !C1_count[1]);
--C1L107 is lcd0:mylcd|state~69
--operation mode is normal
C1L107 = C1_state.home & A1L23 & (!C1_count[0]);
--C1L25 is lcd0:mylcd|count[2]~712
--operation mode is normal
C1L25 = C1L22 & (C1L23 # C1L24 & !C1L107);
--C1L26 is lcd0:mylcd|count[2]~713
--operation mode is normal
C1L26 = C1_state.clear # C1_state.clear1 # C1_state.setfunc # !C1L70;
--C1L27 is lcd0:mylcd|count[2]~714
--operation mode is normal
C1L27 = C1_count[0] & C1_state.clear & A1L23;
--C1L28 is lcd0:mylcd|count[2]~715
--operation mode is normal
C1L28 = C1L27 # A1L14 & (C1_state.write2 # C1_state.setfunc);
--A1L16 is rtl~3
--operation mode is normal
A1L16 = C1_count[2] & C1_count[0] & !C1_count[3] & !C1_count[1];
--C1L92 is lcd0:mylcd|Select~3610
--operation mode is normal
C1L92 = C1_state.write3 & !A1L14 & (!A1L16 # !C1_state.clear1) # !C1_state.write3 & (!A1L16 # !C1_state.clear1);
--C1L29 is lcd0:mylcd|count[2]~716
--operation mode is normal
C1L29 = !C1_state.write1 & C1L92 & (!C1L28 # !C1L26);
--B1L16 is clockdiv:div|add~226
--operation mode is normal
B1L16_carry_eqn = B1L18;
B1L16 = B1_\count:counter[14] $ (!B1L16_carry_eqn);
--B1L17 is clockdiv:div|add~231
--operation mode is arithmetic
B1L17_carry_eqn = B1L22;
B1L17 = B1_\count:counter[13] $ (B1L17_carry_eqn);
--B1L18 is clockdiv:div|add~233
--operation mode is arithmetic
B1L18 = CARRY(!B1L22 # !B1_\count:counter[13]);
--B1L19 is clockdiv:div|add~236
--operation mode is arithmetic
B1L19_carry_eqn = B1L24;
B1L19 = B1_\count:counter[11] $ (B1L19_carry_eqn);
--B1L20 is clockdiv:div|add~238
--operation mode is arithmetic
B1L20 = CARRY(!B1L24 # !B1_\count:counter[11]);
--B1L21 is clockdiv:div|add~241
--operation mode is arithmetic
B1L21_carry_eqn = B1L20;
B1L21 = B1_\count:counter[12] $ (!B1L21_carry_eqn);
--B1L22 is clockdiv:div|add~243
--operation mode is arithmetic
B1L22 = CARRY(B1_\count:counter[12] & (!B1L20));
--B1L23 is clockdiv:div|add~246
--operation mode is arithmetic
B1L23_carry_eqn = B1L26;
B1L23 = B1_\count:counter[10] $ (!B1L23_carry_eqn);
--B1L24 is clockdiv:div|add~248
--operation mode is arithmetic
B1L24 = CARRY(B1_\count:counter[10] & (!B1L26));
--B1L25 is clockdiv:div|add~251
--operation mode is arithmetic
B1L25_carry_eqn = B1L28;
B1L25 = B1_\count:counter[9] $ (B1L25_carry_eqn);
--B1L26 is clockdiv:div|add~253
--operation mode is arithmetic
B1L26 = CARRY(!B1L28 # !B1_\count:counter[9]);
--B1L27 is clockdiv:div|add~256
--operation mode is arithmetic
B1L27_carry_eqn = B1L30;
B1L27 = B1_\count:counter[8] $ (!B1L27_carry_eqn);
--B1L28 is clockdiv:div|add~258
--operation mode is arithmetic
B1L28 = CARRY(B1_\count:counter[8] & (!B1L30));
--B1L29 is clockdiv:div|add~261
--operation mode is arithmetic
B1L29_carry_eqn = B1L36;
B1L29 = B1_\count:counter[7] $ (B1L29_carry_eqn);
--B1L30 is clockdiv:div|add~263
--operation mode is arithmetic
B1L30 = CARRY(!B1L36 # !B1_\count:counter[7]);
--B1L31 is clockdiv:div|add~266
--operation mode is arithmetic
B1L31_carry_eqn = B1L38;
B1L31 = B1_\count:counter[5] $ (B1L31_carry_eqn);
--B1L32 is clockdiv:div|add~268
--operation mode is arithmetic
B1L32 = CARRY(!B1L38 # !B1_\count:counter[5]);
--B1L33 is clockdiv:div|add~271
--operation mode is arithmetic
B1L33_carry_eqn = B1L42;
B1L33 = B1_\count:counter[3] $ (B1L33_carry_eqn);
--B1L34 is clockdiv:div|add~273
--operation mode is arithmetic
B1L34 = CARRY(!B1L42 # !B1_\count:counter[3]);
--B1L35 is clockdiv:div|add~276
--operation mode is arithmetic
B1L35_carry_eqn = B1L32;
B1L35 = B1_\count:counter[6] $ (!B1L35_carry_eqn);
--B1L36 is clockdiv:div|add~278
--operation mode is arithmetic
B1L36 = CARRY(B1_\count:counter[6] & (!B1L32));
--B1L37 is clockdiv:div|add~281
--operation mode is arithmetic
B1L37_carry_eqn = B1L34;
B1L37 = B1_\count:counter[4] $ (!B1L37_carry_eqn);
--B1L38 is clockdiv:div|add~283
--operation mode is arithmetic
B1L38 = CARRY(B1_\count:counter[4] & (!B1L34));
--B1L39 is clockdiv:div|add~286
--operation mode is arithmetic
B1L39_carry_eqn = B1L44;
B1L39 = B1_\count:counter[1] $ (B1L39_carry_eqn);
--B1L40 is clockdiv:div|add~288
--operation mode is arithmetic
B1L40 = CARRY(!B1L44 # !B1_\count:counter[1]);
--B1L41 is clockdiv:div|add~291
--operation mode is arithmetic
B1L41_carry_eqn = B1L40;
B1L41 = B1_\count:counter[2] $ (!B1L41_carry_eqn);
--B1L42 is clockdiv:div|add~293
--operation mode is arithmetic
B1L42 = CARRY(B1_\count:counter[2] & (!B1L40));
--B1L43 is clockdiv:div|add~296
--operation mode is arithmetic
B1L43 = !B1_\count:counter[0];
--B1L44 is clockdiv:div|add~298
--operation mode is arithmetic
B1L44 = CARRY(B1_\count:counter[0]);
--C1L69 is lcd0:mylcd|Select~3573
--operation mode is normal
C1L69 = C1_count[1] & (C1_count[0] & !C1_count[3] # !C1_count[0] & (!C1_count[2])) # !C1_count[1] & (!C1_count[2] # !C1_count[3]);
--C1L93 is lcd0:mylcd|Select~3621
--operation mode is normal
C1L93 = C1_state.home # C1_state.setmode # C1L69 & C1_state.write3;
--reset is reset
--operation mode is input
reset = INPUT();
--clk is clk
--operation mode is input
clk = INPUT();
--data_out[0] is data_out[0]
--operation mode is output
data_out[0] = OUTPUT(C1_lcd_data[0]);
--data_out[1] is data_out[1]
--operation mode is output
data_out[1] = OUTPUT(C1_lcd_data[1]);
--data_out[2] is data_out[2]
--operation mode is output
data_out[2] = OUTPUT(C1_lcd_data[2]);
--data_out[3] is data_out[3]
--operation mode is output
data_out[3] = OUTPUT(C1_lcd_data[3]);
--data_out[4] is data_out[4]
--operation mode is output
data_out[4] = OUTPUT(C1_lcd_data[4]);
--data_out[5] is data_out[5]
--operation mode is output
data_out[5] = OUTPUT(C1_lcd_data[5]);
--data_out[6] is data_out[6]
--operation mode is output
data_out[6] = OUTPUT(C1_lcd_data[6]);
--data_out[7] is data_out[7]
--operation mode is output
data_out[7] = OUTPUT(C1_lcd_data[7]);
--rw_out is rw_out
--operation mode is output
rw_out = OUTPUT(GND);
--cont is cont
--operation mode is output
cont = OUTPUT(GND);
--select_out is select_out
--operation mode is output
select_out = OUTPUT(C1_lcd_select);
--enable_out is enable_out
--operation mode is output
enable_out = OUTPUT(!B1_clock_int);
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