library ieee;
use ieee.std_logic_1164.all;
entity ex09 is port(
 	B,COPY_ENABLE: in std_logic_vector(8 downto 1);
    A: out std_logic_vector(8 downto 1));
end ex09;
architecture archmux of ex09 is
begin
   PROCESS(B,COPY_ENABLE)
     BEGIN
         A<="00000000";
         FOR I IN 8 DOWNTO 1 LOOP
           NEXT WHEN (COPY_ENABLE(I)='0');
           A(I)<=B(I);
         END LOOP;
   END PROCESS;
end archmux;