-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--txd_reg is txd_reg
--operation mode is normal

txd_reg_lut_out = A1L4 & (!A1L5) # !A1L4 & (A1L5 & !txd_buf[0] # !A1L5 & (A1L2));
txd_reg = DFFEAS(txd_reg_lut_out, clkbaud8x, rst, , A1L352, , , , );


--rxd_buf[7] is rxd_buf[7]
--operation mode is normal

rxd_buf[7]_lut_out = rxd_reg2;
rxd_buf[7] = DFFEAS(rxd_buf[7]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--rxd_buf[3] is rxd_buf[3]
--operation mode is normal

rxd_buf[3]_lut_out = rxd_buf[4];
rxd_buf[3] = DFFEAS(rxd_buf[3]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--rxd_buf[4] is rxd_buf[4]
--operation mode is normal

rxd_buf[4]_lut_out = rxd_buf[5];
rxd_buf[4] = DFFEAS(rxd_buf[4]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--rxd_buf[5] is rxd_buf[5]
--operation mode is normal

rxd_buf[5]_lut_out = rxd_buf[6];
rxd_buf[5] = DFFEAS(rxd_buf[5]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--rxd_buf[6] is rxd_buf[6]
--operation mode is normal

rxd_buf[6]_lut_out = rxd_buf[7];
rxd_buf[6] = DFFEAS(rxd_buf[6]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--A1L341 is reduce_or~3072
--operation mode is normal

A1L341 = rxd_buf[5] & (!rxd_buf[6]);


--rxd_buf[2] is rxd_buf[2]
--operation mode is normal

rxd_buf[2]_lut_out = rxd_buf[3];
rxd_buf[2] = DFFEAS(rxd_buf[2]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--rxd_buf[1] is rxd_buf[1]
--operation mode is normal

rxd_buf[1]_lut_out = rxd_buf[2];
rxd_buf[1] = DFFEAS(rxd_buf[1]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--A1L441 is reduce_or~3073
--operation mode is normal

A1L441 = rxd_buf[4] & A1L341 & !rxd_buf[2] & !rxd_buf[1];


--A1L541 is reduce_or~3074
--operation mode is normal

A1L541 = rxd_buf[4] & rxd_buf[5] & !rxd_buf[6] # !rxd_buf[4] & !rxd_buf[5] & rxd_buf[6];


--A1L641 is reduce_or~3075
--operation mode is normal

A1L641 = rxd_buf[6] & (rxd_buf[5] # rxd_buf[4]) # !rxd_buf[6] & rxd_buf[5] & rxd_buf[4];


--rxd_buf[0] is rxd_buf[0]
--operation mode is normal

rxd_buf[0]_lut_out = rxd_buf[1];
rxd_buf[0] = DFFEAS(rxd_buf[0]_lut_out, clkbaud8x, rst, , A1L981, , , , );


--A1L741 is reduce_or~3076
--operation mode is normal

A1L741 = rxd_buf[2] & !rxd_buf[1] & rxd_buf[0] # !rxd_buf[2] & (rxd_buf[1] $ (rxd_buf[0] & rxd_buf[6]));


--A1L841 is reduce_or~3077
--operation mode is normal

A1L841 = rxd_buf[0] & !rxd_buf[1] & (rxd_buf[6]) # !rxd_buf[0] & (rxd_buf[2] # rxd_buf[1] & rxd_buf[6]);


--A1L941 is reduce_or~3078
--operation mode is normal

A1L941 = A1L741 & (A1L641 $ A1L841) # !A1L741 & A1L541 & (A1L841);


--A1L051 is reduce_or~3079
--operation mode is normal

A1L051 = rxd_buf[7] # rxd_buf[3] & !A1L441 # !rxd_buf[3] & (!A1L941);


--A1L151 is reduce_or~3080
--operation mode is normal

A1L151 = rxd_buf[0] & (rxd_buf[4] $ !rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & rxd_buf[1] & (!rxd_buf[2] # !rxd_buf[4]);


--A1L251 is reduce_or~3081
--operation mode is normal

A1L251 = rxd_buf[6] & !rxd_buf[5] & !rxd_buf[4] & A1L151 # !rxd_buf[6] & rxd_buf[5] & rxd_buf[4] & !A1L151;


--A1L351 is reduce_or~3082
--operation mode is normal

A1L351 = rxd_buf[7] # rxd_buf[3] & !A1L441 # !rxd_buf[3] & (!A1L251);


--A1L451 is reduce_or~3083
--operation mode is normal

A1L451 = A1L441 & (!rxd_buf[0]);


--A1L551 is reduce_or~3084
--operation mode is normal

A1L551 = rxd_buf[0] & (rxd_buf[5] # !rxd_buf[2] # !rxd_buf[1]) # !rxd_buf[0] & (rxd_buf[1] & (!rxd_buf[5]) # !rxd_buf[1] & rxd_buf[2]);


--A1L651 is reduce_or~3085
--operation mode is normal

A1L651 = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & A1L551 # !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !A1L551;


--A1L751 is reduce_or~3086
--operation mode is normal

A1L751 = rxd_buf[7] # rxd_buf[3] & !A1L451 # !rxd_buf[3] & (!A1L651);


--A1L851 is reduce_or~3087
--operation mode is normal

A1L851 = rxd_buf[2] & (rxd_buf[1] $ (rxd_buf[0] # !rxd_buf[4])) # !rxd_buf[2] & !rxd_buf[0] & !rxd_buf[1] & rxd_buf[4];


--A1L951 is reduce_or~3088
--operation mode is normal

A1L951 = rxd_buf[6] & !rxd_buf[5] & !rxd_buf[4] # !rxd_buf[6] & rxd_buf[5] & rxd_buf[4];


--A1L061 is reduce_or~3089
--operation mode is normal

A1L061 = rxd_buf[2] & !rxd_buf[0] & rxd_buf[1] & rxd_buf[4] # !rxd_buf[2] & (rxd_buf[1] # !rxd_buf[0] & rxd_buf[4]);


--A1L161 is reduce_or~3090
--operation mode is normal

A1L161 = A1L851 & (A1L061 & A1L341 # !A1L061 & (A1L951)) # !A1L851 & (A1L061);


--A1L261 is reduce_or~3091
--operation mode is normal

A1L261 = !rxd_buf[3] & A1L161 & (A1L541 # A1L851);


--A1L361 is reduce_or~3092
--operation mode is normal

A1L361 = rxd_buf[7] # !A1L261 & (!A1L451 # !rxd_buf[3]);


--A1L461 is reduce_or~3093
--operation mode is normal

A1L461 = !rxd_buf[3] & (rxd_buf[4] $ rxd_buf[5]);


--A1L561 is reduce_or~3094
--operation mode is normal

A1L561 = !rxd_buf[7] & (A1L441 # !rxd_buf[3]);


--A1L661 is reduce_or~3095
--operation mode is normal

A1L661 = rxd_buf[0] & (rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & (rxd_buf[2]);


--A1L761 is reduce_or~3096
--operation mode is normal

A1L761 = rxd_buf[6] & !rxd_buf[4] & (rxd_buf[1] $ A1L661) # !rxd_buf[6] & rxd_buf[4] & (A1L661 # !rxd_buf[1]);


--A1L861 is reduce_or~3097
--operation mode is normal

A1L861 = A1L461 # !rxd_buf[3] & !A1L761 # !A1L561;


--A1L961 is reduce_or~3098
--operation mode is normal

A1L961 = rxd_buf[0] & !rxd_buf[1] & (rxd_buf[2] $ !rxd_buf[4]) # !rxd_buf[0] & rxd_buf[2] & (rxd_buf[1] $ !rxd_buf[4]);


--A1L071 is reduce_or~3099
--operation mode is normal

A1L071 = rxd_buf[6] & !rxd_buf[4] & A1L961 # !rxd_buf[6] & rxd_buf[4] & !A1L961;


--A1L171 is reduce_or~3100
--operation mode is normal

A1L171 = A1L461 # !rxd_buf[3] & !A1L071 # !A1L561;


--A1L271 is reduce_or~3101
--operation mode is normal

A1L271 = rxd_buf[4] & (rxd_buf[1] # rxd_buf[0] $ !rxd_buf[2]);


--A1L371 is reduce_or~3102
--operation mode is normal

A1L371 = rxd_buf[4] & (rxd_buf[1]) # !rxd_buf[4] & (rxd_buf[0] $ (rxd_buf[2] & rxd_buf[1]));


--A1L471 is reduce_or~3103
--operation mode is normal

A1L471 = rxd_buf[6] & !rxd_buf[5] & A1L371 # !rxd_buf[6] & rxd_buf[5] & !A1L371;


--A1L571 is reduce_or~3104
--operation mode is normal

A1L571 = A1L271 & (A1L371 & A1L341 # !A1L371 & (A1L471)) # !A1L271 & (A1L371 & A1L471);


--A1L671 is reduce_or~3105
--operation mode is normal

A1L671 = rxd_buf[7] # rxd_buf[3] & !A1L441 # !rxd_buf[3] & (!A1L571);


--txd_buf[0] is txd_buf[0]
--operation mode is normal

txd_buf[0]_lut_out = A1L932 # A1L042 # !state_tras[1] & !A1L132;
txd_buf[0] = DFFEAS(txd_buf[0]_lut_out, clkbaud8x, rst, , A1L332, , , , );


--div8_tras_reg[2] is div8_tras_reg[2]
--operation mode is normal

div8_tras_reg[2]_lut_out = !div8_tras_reg[2];
div8_tras_reg[2] = DFFEAS(div8_tras_reg[2]_lut_out, clkbaud8x, rst, , A1L67, , , , );


--div8_tras_reg[1] is div8_tras_reg[1]
--operation mode is normal

div8_tras_reg[1]_lut_out = !div8_tras_reg[1];
div8_tras_reg[1] = DFFEAS(div8_tras_reg[1]_lut_out, clkbaud8x, rst, , A1L47, , , , );


--div8_tras_reg[0] is div8_tras_reg[0]
--operation mode is normal

div8_tras_reg[0]_lut_out = !div8_tras_reg[0];
div8_tras_reg[0] = DFFEAS(div8_tras_reg[0]_lut_out, clkbaud8x, rst, , trasstart, , , , );


--A1L131 is reduce_nor~318
--operation mode is normal

A1L131 = div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0];


--trasstart is trasstart
--operation mode is normal

trasstart_lut_out = state_tras[3] & (A1L8 # A1L6 & A1L7) # !state_tras[3] & A1L6 & A1L7;
trasstart = DFFEAS(trasstart_lut_out, clkbaud8x, rst, , A1L422, , , , );


--send_state[0] is send_state[0]
--operation mode is normal

send_state[0]_lut_out = !send_state[0];
send_state[0] = DFFEAS(send_state[0]_lut_out, clkbaud8x, rst, , A1L502, , , , );


--send_state[2] is send_state[2]
--operation mode is normal

send_state[2]_lut_out = !send_state[2];
send_state[2] = DFFEAS(send_state[2]_lut_out, clkbaud8x, rst, , A1L702, , , , );


--send_state[1] is send_state[1]
--operation mode is normal

send_state[1]_lut_out = !send_state[1];
send_state[1] = DFFEAS(send_state[1]_lut_out, clkbaud8x, rst, , A1L802, , , , );


--A1L1 is Select~2993
--operation mode is normal

A1L1 = trasstart & (!send_state[1] # !send_state[2] # !send_state[0]);


--A1L2 is Select~2994
--operation mode is normal

A1L2 = txd_reg # A1L131 & A1L1;


--state_tras[0] is state_tras[0]
--operation mode is normal

state_tras[0]_lut_out = state_tras[0] & !A1L131 # !state_tras[0] & A1L131 & !A1L41;
state_tras[0] = DFFEAS(state_tras[0]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--state_tras[2] is state_tras[2]
--operation mode is normal

state_tras[2]_lut_out = state_tras[2] $ (state_tras[0] & state_tras[1] & A1L131);
state_tras[2] = DFFEAS(state_tras[2]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--state_tras[1] is state_tras[1]
--operation mode is normal

state_tras[1]_lut_out = state_tras[1] $ (A1L31 & (A1L131 # A1L11));
state_tras[1] = DFFEAS(state_tras[1]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--A1L3 is Select~2995
--operation mode is normal

A1L3 = !state_tras[2] & !state_tras[1];


--state_tras[3] is state_tras[3]
--operation mode is normal

state_tras[3]_lut_out = state_tras[3] $ (A1L131 & state_tras[2] & A1L01);
state_tras[3] = DFFEAS(state_tras[3]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--A1L4 is Select~2996
--operation mode is normal

A1L4 = state_tras[3] & (state_tras[0] & A1L131 # !A1L3);


--A1L5 is Select~2997
--operation mode is normal

A1L5 = A1L131 & (A1L3 & (state_tras[0] # state_tras[3]) # !A1L3 & (!state_tras[3]));


--clkbaud8x is clkbaud8x
--operation mode is normal

clkbaud8x_lut_out = clkbaud8x $ !A1L631;
clkbaud8x = DFFEAS(clkbaud8x_lut_out, clk, VCC, , , , , !rst, );


--key_entry2 is key_entry2
--operation mode is normal

key_entry2_lut_out = A1L121;
key_entry2 = DFFEAS(key_entry2_lut_out, clkbaud8x, rst, , , key_entry1, , , !key_entry2);


--A1L352 is txd_reg~121
--operation mode is normal

A1L352 = key_entry2 & (!state_tras[2] & !state_tras[1] # !state_tras[3]);


--rxd_reg2 is rxd_reg2
--operation mode is normal

rxd_reg2_lut_out = rxd_reg1;
rxd_reg2 = DFFEAS(rxd_reg2_lut_out, clkbaud8x, rst, , , , , , );


--div8_rec_reg[2] is div8_rec_reg[2]
--operation mode is normal

div8_rec_reg[2]_lut_out = !div8_rec_reg[2];
div8_rec_reg[2] = DFFEAS(div8_rec_reg[2]_lut_out, clkbaud8x, rst, , A1L07, , , , );


--div8_rec_reg[1] is div8_rec_reg[1]
--operation mode is normal

div8_rec_reg[1]_lut_out = !div8_rec_reg[1];
div8_rec_reg[1] = DFFEAS(div8_rec_reg[1]_lut_out, clkbaud8x, rst, , A1L86, , , , );


--div8_rec_reg[0] is div8_rec_reg[0]
--operation mode is normal

div8_rec_reg[0]_lut_out = !div8_rec_reg[0];
div8_rec_reg[0] = DFFEAS(div8_rec_reg[0]_lut_out, clkbaud8x, rst, , recstart, , , , );


--A1L881 is rxd_buf[7]~143
--operation mode is normal

A1L881 = div8_rec_reg[2] & div8_rec_reg[1] & div8_rec_reg[0];


--state_rec[2] is state_rec[2]
--operation mode is normal

state_rec[2]_lut_out = A1L312 & state_rec[2] # !A1L312 & !A1L712 & (state_rec[2] $ A1L61);
state_rec[2] = DFFEAS(state_rec[2]_lut_out, clkbaud8x, rst, , , , , , );


--state_rec[1] is state_rec[1]
--operation mode is normal

state_rec[1]_lut_out = A1L312 & state_rec[1] # !A1L312 & !A1L712 & (state_rec[1] $ state_rec[0]);
state_rec[1] = DFFEAS(state_rec[1]_lut_out, clkbaud8x, rst, , , , , , );


--A1L621 is recstart~107
--operation mode is normal

A1L621 = !state_rec[2] & !state_rec[1];


--state_rec[0] is state_rec[0]
--operation mode is normal

state_rec[0]_lut_out = state_rec[0] & A1L312 # !state_rec[0] & !A1L312 & (!A1L712);
state_rec[0] = DFFEAS(state_rec[0]_lut_out, clkbaud8x, rst, , , , , , );


--state_rec[3] is state_rec[3]
--operation mode is normal

state_rec[3]_lut_out = A1L312 & state_rec[3] # !A1L312 & !A1L712 & (state_rec[3] $ A1L71);
state_rec[3] = DFFEAS(state_rec[3]_lut_out, clkbaud8x, rst, , , , , , );


--A1L981 is rxd_buf[7]~144
--operation mode is normal

A1L981 = A1L881 & (state_rec[3] $ (state_rec[0] # !A1L621));


--A1L602 is send_state[2]~96
--operation mode is normal

A1L602 = state_tras[3] & state_tras[1];


--A1L932 is txd_buf~1751
--operation mode is normal

A1L932 = A1L602 & (send_state[2] & (!send_state[1]) # !send_state[2] & (send_state[1] # !send_state[0]));


--txd_buf[1] is txd_buf[1]
--operation mode is normal

txd_buf[1]_lut_out = A1L832 & (txd_buf[2]) # !A1L832 & A1L142;
txd_buf[1] = DFFEAS(txd_buf[1]_lut_out, clkbaud8x, rst, , A1L332, VCC, , , !key_entry2);


--A1L042 is txd_buf~1752
--operation mode is normal

A1L042 = txd_buf[1] & (!state_tras[1] # !state_tras[3]) # !key_entry2;