# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		freedev_cycloneII_50_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name BDF_FILE freedev_cycloneII_50_top.bdf
set_global_assignment -name LAST_QUARTUS_VERSION 5.0

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_M22 -to CLK
set_location_assignment PIN_U12 -to RST
set_location_assignment PIN_G3 -to A[1]
set_location_assignment PIN_H4 -to A[2]
set_location_assignment PIN_H3 -to A[3]
set_location_assignment PIN_H6 -to A[4]
set_location_assignment PIN_J4 -to A[5]
set_location_assignment PIN_W3 -to A[6]
set_location_assignment PIN_W4 -to A[7]
set_location_assignment PIN_Y3 -to A[8]
set_location_assignment PIN_Y4 -to A[9]
set_location_assignment PIN_W5 -to A[10]
set_location_assignment PIN_Y2 -to A[11]
set_location_assignment PIN_Y1 -to A[12]
set_location_assignment PIN_W2 -to A[13]
set_location_assignment PIN_W1 -to A[14]
set_location_assignment PIN_V2 -to A[15]
set_location_assignment PIN_P6 -to A[16]
set_location_assignment PIN_N4 -to A[17]
set_location_assignment PIN_N6 -to A[18]
set_location_assignment PIN_U3 -to A[19]
set_location_assignment PIN_U2 -to A[20]
set_location_assignment PIN_U4 -to A[21]
set_location_assignment PIN_T3 -to A[22]
set_location_assignment PIN_V1 -to A[23]
set_location_assignment PIN_L8 -to A[24]
set_location_assignment PIN_J2 -to A[25]
set_location_assignment PIN_N1 -to D[0]
set_location_assignment PIN_N2 -to D[1]
set_location_assignment PIN_P1 -to D[2]
set_location_assignment PIN_P2 -to D[3]
set_location_assignment PIN_R1 -to D[4]
set_location_assignment PIN_R2 -to D[5]
set_location_assignment PIN_T1 -to D[6]
set_location_assignment PIN_T2 -to D[7]
set_location_assignment PIN_P5 -to D[8]
set_location_assignment PIN_P3 -to D[9]
set_location_assignment PIN_R6 -to D[10]
set_location_assignment PIN_R5 -to D[11]
set_location_assignment PIN_T6 -to D[12]
set_location_assignment PIN_T5 -to D[13]
set_location_assignment PIN_R8 -to D[14]
set_location_assignment PIN_R7 -to D[15]
set_location_assignment PIN_H1 -to BE[0]
set_location_assignment PIN_H2 -to BE[1]
set_location_assignment PIN_J1 -to FCS
set_location_assignment PIN_M5 -to FRD
set_location_assignment PIN_M6 -to FWR
set_location_assignment PIN_N3 -to SRAM_CE
set_location_assignment PIN_V4 -to SRAM_WE
set_location_assignment PIN_U1 -to SRAM_OE
set_location_assignment PIN_G7 -to NET_RST
set_location_assignment PIN_F8 -to NET_AEN
set_location_assignment PIN_G6 -to NET_IRQ
set_location_assignment PIN_D6 -to NET_IOR
set_location_assignment PIN_D5 -to NET_IOW

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name TOP_LEVEL_ENTITY freedev_cycloneII_50_top
set_global_assignment -name FAMILY "Cyclone II"

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2C35F484C8
set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "FAST PASSIVE PARALLEL"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS16
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"