?? freedev_cycloneii_50.map.eqn
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--W1L08 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[4]~212
W1L08 = W1L641 & H1_W_alu_result[4] # !W1L641 & (H1_F_pc[2]);
--H1_W_alu_result[3] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|W_alu_result[3]
H1_W_alu_result[3] = AMPP_FUNCTION(CLK, H1L496, H1_E_shift_rot_result[3], E1_data_out, H1L921, H1_R_ctrl_shift_rot);
--H1_F_pc[1] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|F_pc[1]
H1_F_pc[1] = AMPP_FUNCTION(CLK, H1L045, H1L819, E1_data_out, H1L616, H1L516, H1_W_valid);
--W1L97 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[3]~213
W1L97 = W1L641 & H1_W_alu_result[3] # !W1L641 & (H1_F_pc[1]);
--H1_W_alu_result[2] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|W_alu_result[2]
H1_W_alu_result[2] = AMPP_FUNCTION(CLK, H1L196, H1_E_shift_rot_result[2], E1_data_out, H1L921, H1_R_ctrl_shift_rot);
--H1_F_pc[0] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|F_pc[0]
H1_F_pc[0] = AMPP_FUNCTION(CLK, H1L735, H1L619, E1_data_out, H1L616, H1L516, H1_W_valid);
--W1L87 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[2]~214
W1L87 = W1L641 & H1_W_alu_result[2] # !W1L641 & (H1_F_pc[0]);
--K1_cpu_0_instruction_master_dbs_address[1] is freedev_cycloneII_50:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[1]
K1_cpu_0_instruction_master_dbs_address[1] = DFFEAS(K1L6, CLK, !E1_data_out, , K1L4, , , , );
--W1L77 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[1]~215
W1L77 = W1L641 & J1_cpu_0_data_master_dbs_address[1] # !W1L641 & (K1_cpu_0_instruction_master_dbs_address[1]);
--D1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
D1_hub_tdo = AMPP_FUNCTION(!A1L13, D1L41, !CC1_state[8], CC1L12);
--W1_cfi_flash_0_s1_wait_counter[0] is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[0]
W1_cfi_flash_0_s1_wait_counter[0] = DFFEAS(W1L2, CLK, !E1_data_out, , , , , , );
--W1L401 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|reduce_nor~4
W1L401 = W1_cfi_flash_0_s1_wait_counter[3] # W1_cfi_flash_0_s1_wait_counter[2] # W1_cfi_flash_0_s1_wait_counter[1] # W1_cfi_flash_0_s1_wait_counter[0];
--W1L241 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_end_xfer~30
W1L241 = W1L401 # !W1_d1_reasons_to_wait & (W1L82 # W1L02);
--W1L341 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_end_xfer~31
W1L341 = W1L241 & (W1_cfi_flash_0_s1_in_a_read_cycle # AB1_d_write & W1L641);
--W1L631 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]~72
W1L631 = W1L641 & W1L341 # !W1L641 & (W1_tri_state_bridge_0_avalon_slave_arb_addend[1] & !W1L541);
--W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0]
W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] = DFFEAS(W1L541, CLK, !E1_data_out, , W1L831, , , , );
--W1L33 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cpu_0_instruction_master_requests_cfi_flash_0_s1~153
W1L33 = H1_F_pc[25] & !H1_i_read;
--W1L441 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_firsttransfer~84
W1L441 = W1_last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1 & (W1_cpu_0_data_master_requests_cfi_flash_0_s1 # W1L33 & W1_last_cycle_cpu_0_instruction_master_granted_slave_cfi_flash_0_s1) # !W1_last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1 & W1L33 & W1_last_cycle_cpu_0_instruction_master_granted_slave_cfi_flash_0_s1;
--W1L831 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter_next_value[0]~30
W1L831 = W1L541 & (!W1L441 # !W1_tri_state_bridge_0_avalon_slave_slavearbiterlockenable) # !W1L541 & W1L641 & (!W1L441 # !W1_tri_state_bridge_0_avalon_slave_slavearbiterlockenable);
--W1L931 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_winner[0]~25
W1L931 = W1L831 & W1L541 # !W1L831 & (W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0]);
--W1L731 is freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]~73
W1L731 = W1L631 # W1L67 & W1L931 & !W1L341;
--H1_E_src2[27] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[27]
H1_E_src2[27] = AMPP_FUNCTION(CLK, H1L714, H1_D_iw[17], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[27] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[27]
H1_E_src1[27] = AMPP_FUNCTION(CLK, H1L063, H1L669, E1_data_out, H1L656);
--H1_E_src2[26] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[26]
H1_E_src2[26] = AMPP_FUNCTION(CLK, H1L414, H1_D_iw[16], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[26] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[26]
H1_E_src1[26] = AMPP_FUNCTION(CLK, H1L753, H1L469, E1_data_out, H1L656);
--H1_E_src2[25] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[25]
H1_E_src2[25] = AMPP_FUNCTION(CLK, H1L114, H1_D_iw[15], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[25] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[25]
H1_E_src1[25] = AMPP_FUNCTION(CLK, H1L453, H1L269, E1_data_out, H1L656);
--H1_E_src2[24] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[24]
H1_E_src2[24] = AMPP_FUNCTION(CLK, H1L804, H1_D_iw[14], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[24] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[24]
H1_E_src1[24] = AMPP_FUNCTION(CLK, H1L153, H1L069, E1_data_out, H1L656);
--H1_E_src2[23] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[23]
H1_E_src2[23] = AMPP_FUNCTION(CLK, H1L504, H1_D_iw[13], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[23] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[23]
H1_E_src1[23] = AMPP_FUNCTION(CLK, H1L843, H1L859, E1_data_out, H1L656);
--H1_E_src2[22] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[22]
H1_E_src2[22] = AMPP_FUNCTION(CLK, H1L204, H1_D_iw[12], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[22] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[22]
H1_E_src1[22] = AMPP_FUNCTION(CLK, H1L543, H1L659, E1_data_out, H1L656);
--H1_E_src2[21] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[21]
H1_E_src2[21] = AMPP_FUNCTION(CLK, H1L993, H1_D_iw[11], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[21] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[21]
H1_E_src1[21] = AMPP_FUNCTION(CLK, H1L243, H1L459, E1_data_out, H1L656);
--H1_E_src2[20] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[20]
H1_E_src2[20] = AMPP_FUNCTION(CLK, H1L693, H1_D_iw[10], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[20] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[20]
H1_E_src1[20] = AMPP_FUNCTION(CLK, H1L933, H1L259, E1_data_out, H1L656);
--H1_E_src2[19] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[19]
H1_E_src2[19] = AMPP_FUNCTION(CLK, H1L393, H1_D_iw[9], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[19] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[19]
H1_E_src1[19] = AMPP_FUNCTION(CLK, H1L633, H1L059, E1_data_out, H1L656);
--H1_E_src2[18] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[18]
H1_E_src2[18] = AMPP_FUNCTION(CLK, H1L093, H1_D_iw[8], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[18] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[18]
H1_E_src1[18] = AMPP_FUNCTION(CLK, H1L333, H1L849, E1_data_out, H1L656);
--H1_E_src2[17] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[17]
H1_E_src2[17] = AMPP_FUNCTION(CLK, H1L783, H1_D_iw[7], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[17] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[17]
H1_E_src1[17] = AMPP_FUNCTION(CLK, H1L033, H1L649, E1_data_out, H1L656);
--H1_E_src2[16] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[16]
H1_E_src2[16] = AMPP_FUNCTION(CLK, H1L483, H1_D_iw[6], E1_data_out, H1L066, H1_R_ctrl_hi_imm);
--H1_E_src1[16] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[16]
H1_E_src1[16] = AMPP_FUNCTION(CLK, H1L723, H1L449, E1_data_out, H1L656);
--H1_E_src2[15] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[15]
H1_E_src2[15] = AMPP_FUNCTION(CLK, H1L676, E1_data_out);
--H1_E_src1[15] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[15]
H1_E_src1[15] = AMPP_FUNCTION(CLK, H1L423, H1L249, E1_data_out, H1L656);
--H1_E_src2[14] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[14]
H1_E_src2[14] = AMPP_FUNCTION(CLK, H1L576, E1_data_out);
--H1_E_src1[14] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[14]
H1_E_src1[14] = AMPP_FUNCTION(CLK, H1L123, H1L049, E1_data_out, H1L656);
--H1_E_src2[13] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[13]
H1_E_src2[13] = AMPP_FUNCTION(CLK, H1L476, E1_data_out);
--H1_E_src1[13] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[13]
H1_E_src1[13] = AMPP_FUNCTION(CLK, H1L813, H1L839, E1_data_out, H1L656);
--H1_E_src2[12] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[12]
H1_E_src2[12] = AMPP_FUNCTION(CLK, H1L376, E1_data_out);
--H1_E_src1[12] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[12]
H1_E_src1[12] = AMPP_FUNCTION(CLK, H1L513, H1L639, E1_data_out, H1L656);
--H1_E_src2[11] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[11]
H1_E_src2[11] = AMPP_FUNCTION(CLK, H1L276, E1_data_out);
--H1_E_src1[11] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[11]
H1_E_src1[11] = AMPP_FUNCTION(CLK, H1L213, H1L439, E1_data_out, H1L656);
--H1_E_src2[10] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[10]
H1_E_src2[10] = AMPP_FUNCTION(CLK, H1L176, E1_data_out);
--H1_E_src1[10] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[10]
H1_E_src1[10] = AMPP_FUNCTION(CLK, H1L903, H1L239, E1_data_out, H1L656);
--H1_E_src2[9] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[9]
H1_E_src2[9] = AMPP_FUNCTION(CLK, H1L076, E1_data_out);
--H1_E_src1[9] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[9]
H1_E_src1[9] = AMPP_FUNCTION(CLK, H1L603, H1L039, E1_data_out, H1L656);
--H1_E_src2[8] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[8]
H1_E_src2[8] = AMPP_FUNCTION(CLK, H1L966, E1_data_out);
--H1_E_src1[8] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[8]
H1_E_src1[8] = AMPP_FUNCTION(CLK, H1L303, H1L829, E1_data_out, H1L656);
--H1_E_src2[7] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[7]
H1_E_src2[7] = AMPP_FUNCTION(CLK, H1L866, E1_data_out);
--H1_E_src1[7] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[7]
H1_E_src1[7] = AMPP_FUNCTION(CLK, H1L003, H1L629, E1_data_out, H1L656);
--H1_E_src2[6] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[6]
H1_E_src2[6] = AMPP_FUNCTION(CLK, H1L766, E1_data_out);
--H1_E_src1[6] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[6]
H1_E_src1[6] = AMPP_FUNCTION(CLK, H1L792, H1L429, E1_data_out, H1L656);
--H1_E_src2[5] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[5]
H1_E_src2[5] = AMPP_FUNCTION(CLK, H1L666, E1_data_out);
--H1_E_src1[5] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[5]
H1_E_src1[5] = AMPP_FUNCTION(CLK, H1L492, H1L229, E1_data_out, H1L656);
--H1_E_src2[4] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[4]
H1_E_src2[4] = AMPP_FUNCTION(CLK, H1L566, E1_data_out);
--H1_E_src1[4] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src1[4]
H1_E_src1[4] = AMPP_FUNCTION(CLK, H1L192, H1L029, E1_data_out, H1L656);
--H1_E_src2[3] is freedev_cycloneII_50:inst|cpu_0:the_cpu_0|E_src2[3]
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