?? freedev_cycloneii_50.fit.qmsg
字號:
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "altera_internal_jtag~TCKUTAP " "Info: Automatically promoted node altera_internal_jtag~TCKUTAP " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "RST (placed in PIN U12 (CLK14, LVDSCLK7n, Input)) " "Info: Automatically promoted node RST (placed in PIN U12 (CLK14, LVDSCLK7n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G15 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G15" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "delay_reset_block:inst3\|inst4 " "Info: Destination node delay_reset_block:inst3\|inst4" { } { { "delay_reset_block.bdf" "" { Schematic "J:/board/freedev_cycloneII_50/system/delay_reset_block.bdf" { { 208 872 936 256 "inst4" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "delay_reset_block:inst3\|inst4" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { delay_reset_block:inst3|inst4 } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { delay_reset_block:inst3|inst4 } "NODE_NAME" } } } 0} } { } 0} } { { "freedev_cycloneII_50_top.bdf" "" { Schematic "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50_top.bdf" { { 120 232 400 136 "RST" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "RST" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { RST } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { RST } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "freedev_cycloneII_50:inst\|freedev_cycloneII_50_reset_clk_domain_synch_module:freedev_cycloneII_50_reset_clk_domain_synch\|data_out " "Info: Automatically promoted node freedev_cycloneII_50:inst\|freedev_cycloneII_50_reset_clk_domain_synch_module:freedev_cycloneII_50_reset_clk_domain_synch\|data_out " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "freedev_cycloneII_50:inst\|cpu_0:the_cpu_0\|W_rf_wren_a " "Info: Destination node freedev_cycloneII_50:inst\|cpu_0:the_cpu_0\|W_rf_wren_a" { } { { "cpu_0.v" "" { Text "J:/board/freedev_cycloneII_50/system/cpu_0.v" 595 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "freedev_cycloneII_50:inst\|cpu_0:the_cpu_0\|W_rf_wren_a" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { freedev_cycloneII_50:inst|cpu_0:the_cpu_0|W_rf_wren_a } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { freedev_cycloneII_50:inst|cpu_0:the_cpu_0|W_rf_wren_a } "NODE_NAME" } } } 0} } { } 0} } { { "freedev_cycloneII_50.v" "" { Text "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.v" 3193 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "freedev_cycloneII_50:inst\|freedev_cycloneII_50_reset_clk_domain_synch_module:freedev_cycloneII_50_reset_clk_domain_synch\|data_out" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { freedev_cycloneII_50:inst|freedev_cycloneII_50_reset_clk_domain_synch_module:freedev_cycloneII_50_reset_clk_domain_synch|data_out } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { freedev_cycloneII_50:inst|freedev_cycloneII_50_reset_clk_domain_synch_module:freedev_cycloneII_50_reset_clk_domain_synch|data_out } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0 " "Info: Automatically promoted node sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 307 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { sld_hub:sld_hub_inst|CLEAR_SIGNAL~0 } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { sld_hub:sld_hub_inst|CLEAR_SIGNAL~0 } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~411 } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~411 } "NODE_NAME" } } } 0} } { } 0} } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|clear_signal " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|clear_signal " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 36 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|clear_signal" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|clear_signal } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|clear_signal } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "delay_reset_block:inst3\|inst4 " "Info: Automatically promoted node delay_reset_block:inst3\|inst4 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "delay_reset_block.bdf" "" { Schematic "J:/board/freedev_cycloneII_50/system/delay_reset_block.bdf" { { 208 872 936 256 "inst4" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "delay_reset_block:inst3\|inst4" } } } } { "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" "" { Report "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50_cmp.qrpt" Compiler "freedev_cycloneII_50" "UNKNOWN" "V1" "J:/board/freedev_cycloneII_50/system/db/freedev_cycloneII_50.quartus_db" { Floorplan "J:/board/freedev_cycloneII_50/system/" "" "" { delay_reset_block:inst3|inst4 } "NODE_NAME" } "" } } { "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" { Floorplan "J:/board/freedev_cycloneII_50/system/freedev_cycloneII_50.fld" "" "" { delay_reset_block:inst3|inst4 } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" { } { } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" { } { } 0}
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