{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jan 14 21:03:19 2005 " "Info: Processing started: Fri Jan 14 21:03:19 2005" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --import_settings_files=on --export_settings_files=off uart_regs -c uart_regs --check_ios " "Info: Command: quartus_fit --import_settings_files=on --export_settings_files=off uart_regs -c uart_regs --check_ios" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "uart_regs EP1S10B672C6 " "Info: Selected device EP1S10B672C6 for design uart_regs" {  } {  } 0}
{ "Info" "IFYGR_FYGR_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFYGR_FYGR_MIGRATION_NOT_SELECTED_SUB" "EP1S20B672C6 " "Info: Device EP1S20B672C6 is compatible" {  } {  } 2} { "Info" "IFYGR_FYGR_MIGRATION_NOT_SELECTED_SUB" "EP1S25B672C6 " "Info: Device EP1S25B672C6 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in Pin A15 " "Info: Automatically promoted signal clk to use Global clock in Pin A15" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 14 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "wb_we_i Global clock in Pin N3 " "Info: Automatically promoted some destinations of signal wb_we_i to use Global clock in Pin N3" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i77~23 " "Info: Destination i77~23 may be non-global or may not use global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 160 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i352~10 " "Info: Destination i352~10 may be non-global or may not use global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 396 -1 0 } }  } 0}  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 19 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "wb_rst_i Global clock " "Info: Automatically promoted some destinations of signal wb_rst_i to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_transmitter:transmitter\|i12 " "Info: Destination uart_transmitter:transmitter\|i12 may be non-global or may not use global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_transmitter.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_transmitter.v" 43 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_receiver:receiver\|i7~13 " "Info: Destination uart_receiver:receiver\|i7~13 may be non-global or may not use global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_receiver.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_receiver.v" 55 -1 0 } }  } 0}  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 15 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_PIN_USES_INTERNAL_GLOBAL" "wb_rst_i " "Info: Pin wb_rst_i drives global clock, but is not placed in a dedicated clock pin position" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_regs.v" 15 -1 0 } } { "d:/quartus/bin/Assignment Editor.qase" "" "" { Assignment "d:/quartus/bin/Assignment Editor.qase" 1 { { 0 "wb_rst_i" } } } } { "F:/Quartus/Example-b3-1/uart_regs/dev/db/uart_regs_cmp.qrpt" "" "" { Report "F:/Quartus/Example-b3-1/uart_regs/dev/db/uart_regs_cmp.qrpt" Compiler "uart_regs" "UNKNOWN" "V1" "F:/Quartus/Example-b3-1/uart_regs/dev/db/uart_regs.quartus_db" { Floorplan "" "" "" { wb_rst_i } "NODE_NAME" } } } { "F:/Quartus/Example-b3-1/uart_regs/dev/uart_regs.fld" "" "" { Floorplan "F:/Quartus/Example-b3-1/uart_regs/dev/uart_regs.fld" "" "" { wb_rst_i } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "uart_receiver:receiver\|i7~13 Global clock " "Info: Automatically promoted signal uart_receiver:receiver\|i7~13 to use Global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_receiver.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_receiver.v" 55 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "uart_transmitter:transmitter\|i12 Global clock " "Info: Automatically promoted signal uart_transmitter:transmitter\|i12 to use Global clock" {  } { { "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_transmitter.v" "" "" { Text "f:/fan/quatus_word/example-b3-1/uart_regs/src/uart_transmitter.v" 43 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Jan 14 21:03:29 2005 " "Info: Processing ended: Fri Jan 14 21:03:29 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0}  } {  } 0}