{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version " "Info: Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon May 19 15:40:25 2008 " "Info: Processing started: Mon May 19 15:40:25 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off I2C_FPGA -c I2C_FPGA " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off I2C_FPGA -c I2C_FPGA" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "I2C_FPGA EP2C5Q208C8 " "Info: Selected device EP2C5Q208C8 for design \"I2C_FPGA\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C5Q208I8 " "Info: Device EP2C5Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8Q208C8 " "Info: Device EP2C8Q208C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8Q208I8 " "Info: Device EP2C8Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ 1 " "Info: Pin ~ASDO~ is reserved at location 1" {  } { { "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ 2 " "Info: Pin ~nCSO~ is reserved at location 2" {  } { { "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS41p/nCEO~ 108 " "Info: Pin ~LVDS41p/nCEO~ is reserved at location 108" {  } { { "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" { ~LVDS41p/nCEO~ } } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS41p/nCEO~ } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS41p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk (placed in PIN 23 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node clk (placed in PIN 23 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|en\[1\] " "Info: Destination node i2c:inst4\|en\[1\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 706 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|en[1] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|en[1] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|en\[0\] " "Info: Destination node i2c:inst4\|en\[0\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 706 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|en[0] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|en[0] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|readData_reg\[4\] " "Info: Destination node i2c:inst4\|readData_reg\[4\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[4] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[4] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|readData_reg\[5\] " "Info: Destination node i2c:inst4\|readData_reg\[5\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[5] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[5] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|readData_reg\[6\] " "Info: Destination node i2c:inst4\|readData_reg\[6\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[6] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[6] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|readData_reg\[7\] " "Info: Destination node i2c:inst4\|readData_reg\[7\]" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[7] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|readData_reg[7] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[9\] " "Info: Destination node delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[9\]" {  } { { "db/cntr_p7j.tdf" "" { Text "E:/project/qii/yg2c58eb/I2C_test/db/cntr_p7j.tdf" 87 19 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[9] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[9] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[8\] " "Info: Destination node delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[8\]" {  } { { "db/cntr_p7j.tdf" "" { Text "E:/project/qii/yg2c58eb/I2C_test/db/cntr_p7j.tdf" 87 19 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[8] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[8] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[7\] " "Info: Destination node delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[7\]" {  } { { "db/cntr_p7j.tdf" "" { Text "E:/project/qii/yg2c58eb/I2C_test/db/cntr_p7j.tdf" 87 19 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[7] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[7] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[6\] " "Info: Destination node delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\|counter_reg_bit1a\[6\]" {  } { { "db/cntr_p7j.tdf" "" { Text "E:/project/qii/yg2c58eb/I2C_test/db/cntr_p7j.tdf" 87 19 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[6] } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_p7j:auto_generated|safe_q[6] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Info: Non-global destination nodes limited to 10 nodes" {  } {  } 0 0 "Non-global destination nodes limited to %1!d! nodes" 0 0 "" 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0}  } { { "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/programfile/altera/72/quartus/bin/pin_planner.ppl" { clk } } } { "e:/programfile/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/programfile/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "I2C_FPGA.bdf" "" { Schematic "E:/project/qii/yg2c58eb/I2C_test/I2C_FPGA.bdf" { { -96 -64 104 -80 "clk" "" } } } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "i2c:inst4\|WideOr3~64  " "Info: Automatically promoted node i2c:inst4\|WideOr3~64 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0}  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 733 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|WideOr3~64 } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|WideOr3~64 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "delay_reset_block:inst2\|inst4  " "Info: Automatically promoted node delay_reset_block:inst2\|inst4 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|main_state~1550 " "Info: Destination node i2c:inst4\|main_state~1550" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 39 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1550 } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1550 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|main_state~1562 " "Info: Destination node i2c:inst4\|main_state~1562" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 39 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1562 } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1562 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "i2c:inst4\|main_state~1563 " "Info: Destination node i2c:inst4\|main_state~1563" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 39 -1 0 } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1563 } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c:inst4|main_state~1563 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0}  } { { "delay_reset_block.bdf" "" { Schematic "E:/project/qii/yg2c58eb/I2C_test/delay_reset_block.bdf" { { 208 872 936 256 "inst4" "" } } } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|inst4 } "NODE_NAME" } } { "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { delay_reset_block:inst2|inst4 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0}