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m255cModel Technologyde:\program\fpga_program\for_fpga\can\ise\canbusvcan_acfIV^L;BVT]]=4kB?3^f5iD^0V7KkB[VcOEkYNUAC[hg:703w1105406889Fcan_acf.vFtimescale.vFcan_defines.vL0 83OE;L;5.7e;17r131vcan_bspIPMf]^gg<XiUYnGL[BTz:G0VBcZ_2RnV:jeA0[TegXg[e2w1105406889Fcan_bsp.vFtimescale.vFcan_defines.vL0 158OE;L;5.7e;17r131vcan_btlIihDAI?BlTi:AkAd0^iiNC1V1Q7JB780ZIFo57zo?DBXE2w1105406889Fcan_btl.vFtimescale.vFcan_defines.vL0 99OE;L;5.7e;17r131vcan_crcI?bigXBl;EVEeFgMoccm8g2Ve<]k;O8n0>:I=Y2GGIX1G2w1105406889Fcan_crc.vFtimescale.vL0 72OE;L;5.7e;17r131vcan_fifoIn6^N7RBLDSN;6HoD46a9T0V]@jb;1TS[Klg@n6N8[0<i3w1105406889Fcan_fifo.vFtimescale.vFcan_defines.vL0 109OE;L;5.7e;17r131vcan_iboIg38Xo?[g1@4i>VU]`0Qf^3V:dZ^RJa1gF4jhZ4RnH9FO1w1105406155Fcan_ibo.vL0 66OE;L;5.7e;17r131vcan_registerIG`Wo6a;[RoOhgLSaj7gVe2V`YiFz_:HKXh8fnBd6fgFI3w1105406889Fcan_register.vFtimescale.vL0 77OE;L;5.7e;17r131vcan_register_asynIRh4OkLji3mz9=MfgYOc;P1Vo3d1JfECSa_>`F?<g:8mT3w1105406889Fcan_register_asyn.vFtimescale.vL0 77OE;L;5.7e;17r131vcan_register_asyn_synI[N@fB`cY;>AMHbV8WTaGB2V3?jl0h9_<zm;WfWG75V712w1105406889Fcan_register_asyn_syn.vFtimescale.vL0 77OE;L;5.7e;17r131vcan_registersIYOh2Q>NAnG;cRIJGT<LcF2Va8ZjzBAU0]Z1;PA_Y=Fib1w1105406889Fcan_registers.vFtimescale.vFcan_defines.vL0 133OE;L;5.7e;17r131vcan_testbenchI5XCRGj`lWSOHFFW1ZVh;d0V`okO93@>SQJ=E:Rgig?XP2w1105406889Fcan_testbench.vFtimescale.vFcan_defines.vFcan_testbench_defines.vL0 176OE;L;5.7e;17r131vcan_topIV`lUb@oeWK_cMzh>Gc0HP1V<F1ILh6mmnbZDKha0Fde50w1105406889Fcan_top.vFtimescale.vFcan_defines.vL0 161OE;L;5.7e;17r131vglblI;3bdO6U;R_i?oXm0zZ=6m3V]6_PH00iDgcD`AVz9`gA:0w1059855545FC:/Program Files/Xilinx/verilog/src/glbl.vL0 5OE;L;5.7e;17r131?? 快捷鍵說明
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