# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:21:17  NOVEMBER 25, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 4.0
set_global_assignment -name VHDL_FILE act.vhd
set_global_assignment -name VHDL_FILE any_even.vhd
set_global_assignment -name VHDL_FILE minute.vhd
set_global_assignment -name VHDL_FILE msecond.vhd
set_global_assignment -name VHDL_FILE second.vhd
set_global_assignment -name VHDL_FILE watch.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_1 -to clk
set_location_assignment PIN_2 -to clk1
set_location_assignment PIN_16 -to led\[0\]
set_location_assignment PIN_17 -to led\[1\]
set_location_assignment PIN_18 -to led\[2\]
set_location_assignment PIN_19 -to led\[3\]
set_location_assignment PIN_21 -to led\[4\]
set_location_assignment PIN_22 -to led\[5\]
set_location_assignment PIN_23 -to led\[6\]
set_location_assignment PIN_24 -to ss
set_location_assignment PIN_5 -to set
set_location_assignment PIN_11 -to selout\[0\]
set_location_assignment PIN_10 -to selout\[1\]
set_location_assignment PIN_81 -to selout\[2\]
set_location_assignment PIN_80 -to selout\[3\]
set_location_assignment PIN_79 -to selout\[4\]
set_location_assignment PIN_78 -to selout\[5\]
set_location_assignment PIN_3 -to clr
set_location_assignment PIN_6 -to en
set_location_assignment PIN_44 -to set_hour
set_location_assignment PIN_84 -to set_min
set_location_assignment PIN_7 -to set_fun
set_location_assignment PIN_8 -to set_clk
set_location_assignment PIN_53 -to alarm

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY FLEX10K
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 4
set_global_assignment -name TOP_LEVEL_ENTITY watch

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPF10K10LC84-4"