LIBRARY IEEE; -- 硬件演奏電路頂層設(shè)計
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY Songer IS                                    
    PORT (   CLK12MHZ : IN STD_LOGIC;             --音調(diào)頻率信號         
             CLK8HZ   : IN STD_LOGIC;               --節(jié)拍頻率信號
               CODE1  : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);-- 簡譜碼輸出顯示
               HIGH1  : OUT STD_LOGIC; --高8度指示
             SPKOUT   : OUT STD_LOGIC );--聲音輸出
 END;
ARCHITECTURE one OF Songer IS
   COMPONENT NoteTabs
     PORT ( clk    : IN STD_LOGIC;
         ToneIndex : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) );
    END COMPONENT;
    COMPONENT ToneTaba
        PORT ( Index :  IN  STD_LOGIC_VECTOR (3 DOWNTO 0) ;
               CODE  : OUT  STD_LOGIC_VECTOR (3 DOWNTO 0) ;
               HIGH  : OUT STD_LOGIC; 
               Tone  : OUT  STD_LOGIC_VECTOR (10 DOWNTO 0) );
    END COMPONENT;
    COMPONENT Speakera
        PORT  ( clk  : IN STD_LOGIC;
                Tone : IN STD_LOGIC_VECTOR (10 DOWNTO 0);
                SpkS : OUT STD_LOGIC  );
    END COMPONENT;
    SIGNAL Tone : STD_LOGIC_VECTOR (10 DOWNTO 0);
    SIGNAL ToneIndex : STD_LOGIC_VECTOR (3 DOWNTO 0); 
 BEGIN
u1 : NoteTabs  PORT MAP (clk=>CLK8HZ, ToneIndex=>ToneIndex);
u2 : ToneTaba PORT MAP (Index=>ToneIndex,Tone=>Tone,CODE=>CODE1,HIGH=>HIGH1);
u3 : Speakera PORT MAP(clk=>CLK12MHZ,Tone=>Tone, SpkS=>SPKOUT );
END;