--/*****************************************************************************-- * 源文件:	pwm_counter.vhd-- * 模塊:   	PWM信號產生-- * 版權:-- *         	Copyright(C) 北京聯華眾科科技有限公司-- *						www.lianhua-zhongke.com.cn-- * 版本：  	Version 1.0-- * -- * 功能說明:-- *		   	根據參數指定頻率和占空比產生PWM信號，并通過串口將PWM參數發送-- *			PC上運行的聯華眾科通信通顯示。-- *			串口工作參數：-- *			波特率： 9600-- *			數據位數： 8-- *			奇偶位： 無-- *			停止位： 1-- *-- * 參數說明：-- *	       	輸出-- *			data - 待發送的 PWM信號參數-- *			s_50ms - 定時發送數據的時鐘-- *			s_out - PWM信號輸出-- *-- *			輸入-- *			clock - 波特率頻率*2-- *			reset - 復位信號，低電平有效-- *-- *			參數-- *			T - PWM周期-- *			Th - PWM正半周期寬度-- *			inner_counter_width - 內部計數器變量位數，可容納 T即可-- *			send_witdh - 定時發送數據的時鐘的寬度-- *			send_counter_bits - 內部計數器變量位數，用以產生定時-- *								   發送數據的時鐘-- *-- * 變更記錄: -- *         2006.01.28, 新建-- *-- *****************************************************************************/LIBRARY ieee;USE ieee.std_logic_1164.all;USE ieee.std_logic_arith.all;USE ieee.std_logic_unsigned.all;ENTITY pwm_counter IS	GENERIC	(		T : INTEGER:= 24000;		Th : INTEGER:= 2400;		inner_counter_width : INTEGER:= 32;				send_witdh : INTEGER:= 1200000;		send_counter_bits : INTEGER:= 32	);		PORT	(		data : OUT STD_LOGIC_VECTOR(7 downto 0):= "00000000";				send_timer : OUT STD_LOGIC;				pwm_out : OUT STD_LOGIC;				clock : IN STD_LOGIC;		reset : IN STD_LOGIC	);END pwm_counter;ARCHITECTURE pwm_architecture OF pwm_counter IS		SIGNAL byte_index : INTEGER RANGE 0 TO 31:=0;BEGIN	PROCESS(byte_index)		--VARIABLE byte_index : STD_LOGIC_VECTOR(3 downto 0);				VARIABLE full_data : STD_LOGIC_VECTOR(31 downto 0):= X"00000000";		VARIABLE idata : STD_LOGIC_VECTOR(3 downto 0):= "0000";	BEGIN				IF (byte_index = 0) THEN			data <= X"71";--pwm generate cmd		ELSIF (byte_index>=17 AND byte_index<=19) THEN			data <= X"5A";--"Z"		ELSE			IF (byte_index>=1 AND byte_index<=8) THEN				full_data := CONV_STD_LOGIC_VECTOR(T, 32);			ELSE				full_data := CONV_STD_LOGIC_VECTOR(Th, 32);			END IF;						IF (byte_index=1 OR byte_index=9) THEN idata := full_data(3 downto 0);			ELSIF (byte_index=2 OR byte_index=10) THEN idata := full_data(7 downto 4);			ELSIF (byte_index=3 OR byte_index=11) THEN	idata := full_data(11 downto 8);			ELSIF (byte_index=4 OR byte_index=12) THEN	idata := full_data(15 downto 12);			ELSIF (byte_index=5 OR byte_index=13) THEN	idata := full_data(19 downto 16);			ELSIF (byte_index=6 OR byte_index=14) THEN	idata := full_data(23 downto 20);			ELSIF (byte_index=7 OR byte_index=15) THEN	idata := full_data(27 downto 24);			ELSIF (byte_index=8 OR byte_index=16) THEN	idata := full_data(31 downto 28);			ELSE idata := "0000";			END IF;						data <= X"00";			CASE idata IS				WHEN "0000" => data <= X"30";				WHEN "0001" => data <= X"31";				WHEN "0010" => data <= X"32";				WHEN "0011" => data <= X"33";				WHEN "0100" => data <= X"34";				WHEN "0101" => data <= X"35";				WHEN "0110" => data <= X"36";				WHEN "0111" => data <= X"37";				WHEN "1000" => data <= X"38";				WHEN "1001" => data <= X"39";				WHEN "1010" => data <= X"41";				WHEN "1011" => data <= X"42";				WHEN "1100" => data <= X"43";				WHEN "1101" => data <= X"44";				WHEN "1110" => data <= X"45";				WHEN "1111" => data <= X"46";				WHEN OTHERS => data <= X"00";			END CASE;		END IF;								END PROCESS;		PROCESS(clock, reset)		VARIABLE delay_counter : INTEGER RANGE 0 TO T-1;		VARIABLE send_counter : INTEGER RANGE 0 TO send_witdh-1;	BEGIN				IF (reset = '0') THEN			pwm_out <= '1';			delay_counter := 0;			send_counter := 0;			byte_index <= 0;		ELSIF(clock = '1' AND clock'EVENT) THEN			IF (delay_counter = Th-1) THEN				pwm_out <= '0';				delay_counter := delay_counter+1;			ELSIF(delay_counter = T-1) THEN				pwm_out <= '1';				delay_counter := 0;			ELSE				delay_counter := delay_counter+1;			END IF;							IF (send_counter = send_witdh-1) THEN				send_timer <= '0';				send_counter := 0;				ELSIF (send_counter = send_witdh/2-1) THEN				send_timer <= '1';				send_counter := send_counter+1;																IF (byte_index = 17) THEN					byte_index <= 0;				ELSE					byte_index <= byte_index + 1;				END IF;			ELSE				send_counter := send_counter+1;			END IF;		END IF;			END PROCESS;END pwm_architecture;