/********************************************************************** * Assigning an unpacked array to an unpacked arrays of a different * size using bit-stream casting * * Author: Stuart Sutherland * * (c) Copyright 2003, Sutherland HDL, Inc. *** ALL RIGHTS RESERVED *** * www.sutherland-hdl.com * * Used with permission in the book, "SystemVerilog for Design" *  By Stuart Sutherland, Simon Davidmann, and Peter Flake. *  Book copyright: 2003, Kluwer Academic Publishers, Norwell, MA, USA *  www.wkap.il, ISBN: 0-4020-7530-8 * * Revision History: *   1.00 15 Dec 2003 -- original code, as included in book *   1.01 10 Jul 2004 -- cleaned up comments, added expected results *                       to output messages *   1.10 21 Jul 2004 -- corrected errata as printed in the book *                       "SystemVerilog for Design" (first edition) and *                       to bring the example into conformance with the *                       final Accellera SystemVerilog 3.1a standard *                       (for a description of changes, see the file *                       "errata_SV-Design-book_26-Jul-2004.txt") * * Caveat: Expected results displayed for this code example are based * on an interpretation of the SystemVerilog 3.1 standard by the code * author or authors.  At the time of writing, official SystemVerilog * validation suites were not available to validate the example. * * RIGHT TO USE: This code example, or any portion thereof, may be * used and distributed without restriction, provided that this entire * comment block is included with the example. * * DISCLAIMER: THIS CODE EXAMPLE IS PROVIDED "AS IS" WITHOUT WARRANTY * OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED * TO WARRANTIES OF MERCHANTABILITY, FITNESS OR CORRECTNESS. IN NO * EVENT SHALL THE AUTHOR OR AUTHORS BE LIABLE FOR ANY DAMAGES, * INCLUDING INCIDENTAL OR CONSEQUENTIAL DAMAGES, ARISING OUT OF THE * USE OF THIS CODE. *********************************************************************/module test;  typedef int data_t [3:0][7:0];   // unpacked type  data_t a;  int b [3:0][3:0]; // unpacked array  initial begin    b = {{0,0,0,'hF},{0,0,0,'hA},{0,0,0,'hC},{0,0,0,'hE}};    a = data_t'(b);   // assign unpacked array to unpacked array of a                      // different size, using casting    $display("\n a[0][0] = %h (expected ce)\n", a[0][0]);    $finish;  endendmodule