--M1L36Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[14]~3
--operation mode is clrb_cntr

M1L36Q = M1_q[14];

--M1L13 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[14]~COUT
--operation mode is clrb_cntr

M1L13 = CARRY(M1_q[14] & (M1L92));


--F1L01 is saomiao:inst8|reduce_nor~106
--operation mode is normal

F1L01 = M1_q[15] # M1_q[13] # M1_q[12] # !M1_q[14];

--F1L51 is saomiao:inst8|reduce_nor~111
--operation mode is normal

F1L51 = M1_q[15] # M1_q[13] # M1_q[12] # !M1_q[14];


--M1_q[8] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[8]
--operation mode is clrb_cntr

M1_q[8]_lut_out = (M1_q[8] $ (F1L41 & M1L71)) & VCC;
M1_q[8] = DFFEA(M1_q[8]_lut_out, clk, , , F1L41, , );

--M1L15Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[8]~4
--operation mode is clrb_cntr

M1L15Q = M1_q[8];

--M1L91 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT
--operation mode is clrb_cntr

M1L91 = CARRY(M1_q[8] & (M1L71));


--M1_q[11] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[11]
--operation mode is clrb_cntr

M1_q[11]_lut_out = (M1_q[11] $ (F1L41 & M1L32)) & VCC;
M1_q[11] = DFFEA(M1_q[11]_lut_out, clk, , , F1L41, , );

--M1L75Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[11]~5
--operation mode is clrb_cntr

M1L75Q = M1_q[11];

--M1L52 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[11]~COUT
--operation mode is clrb_cntr

M1L52 = CARRY(M1_q[11] & (M1L32));


--M1_q[10] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[10]
--operation mode is clrb_cntr

M1_q[10]_lut_out = (M1_q[10] $ (F1L41 & M1L12)) & VCC;
M1_q[10] = DFFEA(M1_q[10]_lut_out, clk, , , F1L41, , );

--M1L55Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[10]~6
--operation mode is clrb_cntr

M1L55Q = M1_q[10];

--M1L32 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT
--operation mode is clrb_cntr

M1L32 = CARRY(M1_q[10] & (M1L12));


--M1_q[9] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[9]
--operation mode is clrb_cntr

M1_q[9]_lut_out = (M1_q[9] $ (F1L41 & M1L91)) & VCC;
M1_q[9] = DFFEA(M1_q[9]_lut_out, clk, , , F1L41, , );

--M1L35Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[9]~7
--operation mode is clrb_cntr

M1L35Q = M1_q[9];

--M1L12 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT
--operation mode is clrb_cntr

M1L12 = CARRY(M1_q[9] & (M1L91));


--F1L11 is saomiao:inst8|reduce_nor~107
--operation mode is normal

F1L11 = M1_q[8] # !M1_q[9] # !M1_q[10] # !M1_q[11];

--F1L61 is saomiao:inst8|reduce_nor~112
--operation mode is normal

F1L61 = M1_q[8] # !M1_q[9] # !M1_q[10] # !M1_q[11];


--M1_q[7] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[7]
--operation mode is clrb_cntr

M1_q[7]_lut_out = (M1_q[7] $ (F1L41 & M1L51)) & VCC;
M1_q[7] = DFFEA(M1_q[7]_lut_out, clk, , , F1L41, , );

--M1L94Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[7]~8
--operation mode is clrb_cntr

M1L94Q = M1_q[7];

--M1L71 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT
--operation mode is clrb_cntr

M1L71 = CARRY(M1_q[7] & (M1L51));


--M1_q[6] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[6]
--operation mode is clrb_cntr

M1_q[6]_lut_out = (M1_q[6] $ (F1L41 & M1L31)) & VCC;
M1_q[6] = DFFEA(M1_q[6]_lut_out, clk, , , F1L41, , );

--M1L74Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[6]~9
--operation mode is clrb_cntr

M1L74Q = M1_q[6];

--M1L51 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT
--operation mode is clrb_cntr

M1L51 = CARRY(M1_q[6] & (M1L31));


--M1_q[4] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

M1_q[4]_lut_out = (M1_q[4] $ (F1L41 & M1L9)) & VCC;
M1_q[4] = DFFEA(M1_q[4]_lut_out, clk, , , F1L41, , );

--M1L34Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[4]~10
--operation mode is clrb_cntr

M1L34Q = M1_q[4];

--M1L11 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

M1L11 = CARRY(M1_q[4] & (M1L9));


--M1_q[5] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

M1_q[5]_lut_out = (M1_q[5] $ (F1L41 & M1L11)) & VCC;
M1_q[5] = DFFEA(M1_q[5]_lut_out, clk, , , F1L41, , );

--M1L54Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[5]~11
--operation mode is clrb_cntr

M1L54Q = M1_q[5];

--M1L31 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT
--operation mode is clrb_cntr

M1L31 = CARRY(M1_q[5] & (M1L11));


--F1L21 is saomiao:inst8|reduce_nor~108
--operation mode is normal

F1L21 = M1_q[7] # M1_q[6] # M1_q[4] # !M1_q[5];

--F1L71 is saomiao:inst8|reduce_nor~113
--operation mode is normal

F1L71 = M1_q[7] # M1_q[6] # M1_q[4] # !M1_q[5];


--M1_q[3] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

M1_q[3]_lut_out = (M1_q[3] $ (F1L41 & M1L7)) & VCC;
M1_q[3] = DFFEA(M1_q[3]_lut_out, clk, , , F1L41, , );

--M1L14Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~12
--operation mode is clrb_cntr

M1L14Q = M1_q[3];

--M1L9 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

M1L9 = CARRY(M1_q[3] & (M1L7));


--M1_q[2] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

M1_q[2]_lut_out = (M1_q[2] $ (F1L41 & M1L5)) & VCC;
M1_q[2] = DFFEA(M1_q[2]_lut_out, clk, , , F1L41, , );

--M1L93Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~13
--operation mode is clrb_cntr

M1L93Q = M1_q[2];

--M1L7 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

M1L7 = CARRY(M1_q[2] & (M1L5));


--M1_q[1] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

M1_q[1]_lut_out = (M1_q[1] $ (F1L41 & M1L3)) & VCC;
M1_q[1] = DFFEA(M1_q[1]_lut_out, clk, , , F1L41, , );

--M1L73Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~14
--operation mode is clrb_cntr

M1L73Q = M1_q[1];

--M1L5 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

M1L5 = CARRY(M1_q[1] & (M1L3));


--M1_q[0] is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

M1_q[0]_lut_out = (F1L41 $ M1_q[0]) & VCC;
M1_q[0] = DFFEA(M1_q[0]_lut_out, clk, , , F1L41, , );

--M1L53Q is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~15
--operation mode is clrb_cntr

M1L53Q = M1_q[0];

--M1L3 is saomiao:inst8|lpm_counter:clkx_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

M1L3 = CARRY(M1_q[0]);


--F1L31 is saomiao:inst8|reduce_nor~109
--operation mode is normal

F1L31 = M1_q[3] # M1_q[2] # M1_q[1] # M1_q[0];

--F1L81 is saomiao:inst8|reduce_nor~114
--operation mode is normal

F1L81 = M1_q[3] # M1_q[2] # M1_q[1] # M1_q[0];


--F1L41 is saomiao:inst8|reduce_nor~110
--operation mode is normal

F1L41 = F1L01 # F1L11 # F1L21 # F1L31;

--F1L91 is saomiao:inst8|reduce_nor~115
--operation mode is normal

F1L91 = F1L01 # F1L11 # F1L21 # F1L31;


--C1_rr[5] is second:inst2|rr[5]
--operation mode is normal

C1_rr[5]_lut_out = K3_cs_buffer[5];
C1_rr[5] = DFFEA(C1_rr[5]_lut_out, clk, , , , , );

--C1L44Q is second:inst2|rr[5]~389
--operation mode is normal

C1L44Q = C1_rr[5];


--C1_rr[4] is second:inst2|rr[4]
--operation mode is normal

C1_rr[4]_lut_out = K3_cs_buffer[4];
C1_rr[4] = DFFEA(C1_rr[4]_lut_out, clk, , , , , );

--C1L24Q is second:inst2|rr[4]~390
--operation mode is normal

C1L24Q = C1_rr[4];


--C1_rr[3] is second:inst2|rr[3]
--operation mode is normal

C1_rr[3]_lut_out = K3_cs_buffer[3];
C1_rr[3] = DFFEA(C1_rr[3]_lut_out, clk, , , , , );

--C1L04Q is second:inst2|rr[3]~391
--operation mode is normal

C1L04Q = C1_rr[3];


--C1_rr[2] is second:inst2|rr[2]
--operation mode is normal

C1_rr[2]_lut_out = K3_cs_buffer[2];
C1_rr[2] = DFFEA(C1_rr[2]_lut_out, clk, , , , , );

--C1L83Q is second:inst2|rr[2]~392
--operation mode is normal

C1L83Q = C1_rr[2];


--C1L8 is second:inst2|reduce_nor~345
--operation mode is normal

C1L8 = C1_rr[5] # C1_rr[4] # C1_rr[3] # C1_rr[2];

--C1L81 is second:inst2|reduce_nor~373
--operation mode is normal

C1L81 = C1_rr[5] # C1_rr[4] # C1_rr[3] # C1_rr[2];


--C1_rr[1] is second:inst2|rr[1]
--operation mode is normal

C1_rr[1]_lut_out = K3_cs_buffer[1];
C1_rr[1] = DFFEA(C1_rr[1]_lut_out, clk, , , , , );

--C1L63Q is second:inst2|rr[1]~393
--operation mode is normal

C1L63Q = C1_rr[1];


--C1_rr[0] is second:inst2|rr[0]
--operation mode is arithmetic

C1_rr[0]_lut_out = !C1_rr[0] & C1L7;
C1_rr[0] = DFFEA(C1_rr[0]_lut_out, clk, , , , , );

--C1L43Q is second:inst2|rr[0]~394
--operation mode is arithmetic

C1L43Q = C1_rr[0];

--K3_cout[0] is second:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

K3_cout[0] = CARRY(C1_rr[0]);


--C1_rr[30] is second:inst2|rr[30]
--operation mode is normal

C1_rr[30]_lut_out = H1_unreg_res_node[30];
C1_rr[30] = DFFEA(C1_rr[30]_lut_out, clk, , , , , );

--C1L49Q is second:inst2|rr[30]~395
--operation mode is normal

C1L49Q = C1_rr[30];


--C1L9 is second:inst2|reduce_nor~346
--operation mode is normal

C1L9 = C1L8 # C1_rr[1] # C1_rr[0] # C1_rr[30];

--C1L91 is second:inst2|reduce_nor~374
--operation mode is normal

C1L91 = C1L8 # C1_rr[1] # C1_rr[0] # C1_rr[30];


--C1L7 is second:inst2|reduce_nor~0
--operation mode is normal

C1L7 = C1L9 # !C1L71 # !C1L61 # !C1L51;

--C1L02 is second:inst2|reduce_nor~375
--operation mode is normal

C1L02 = C1L9 # !C1L71 # !C1L61 # !C1L51;


--C1L01 is second:inst2|reduce_nor~350
--operation mode is normal

C1L01 = C1_sl[1] # C1_sl[2] # !C1_sl[3] # !C1_sl[0];

--C1L12 is second:inst2|reduce_nor~376
--operation mode is normal

C1L12 = C1_sl[1] # C1_sl[2] # !C1_sl[3] # !C1_sl[0];


--C1L301 is second:inst2|sh[3]~8
--operation mode is normal

C1L301 = !pause & !C1L01;

--C1L501 is second:inst2|sh[3]~121
--operation mode is normal

C1L501 = !pause & !C1L01;


--B1L32 is minute:inst|reduce_nor~38
--operation mode is normal

B1L32 = B1_msl[1] # B1_msl[3] # !B1_msl[2] # !B1_msl[0];

--B1L52 is minute:inst|reduce_nor~40
--operation mode is normal

B1L52 = B1_msl[1] # B1_msl[3] # !B1_msl[2] # !B1_msl[0];


--C1L11 is second:inst2|reduce_nor~351
--operation mode is normal

C1L11 = C1_sh[1] # C1_sh[2] # !C1_sh[3] # !C1_sh[0];

--C1L22 is second:inst2|reduce_nor~377
--operation mode is normal

C1L22 = C1_sh[1] # C1_sh[2] # !C1_sh[3] # !C1_sh[0];


--B1L42 is minute:inst|reduce_nor~39
--operation mode is normal

B1L42 = B1_msh[1] # B1_msh[2] # !B1_msh[3] # !B1_msh[0];

--B1L62 is minute:inst|reduce_nor~41
--operation mode is normal

B1L62 = B1_msh[1] # B1_msh[2] # !B1_msh[3] # !B1_msh[0];


--C1L601 is second:inst2|sh~110
--operation mode is normal

C1L601 = C1_sh[3] & (C1_sh[1] $ C1_sh[2] # !C1_sh[0]) # !C1_sh[3] & C1_sh[1] & C1_sh[2] & C1_sh[0];

--C1L701 is second:inst2|sh~122
--operation mode is normal

C1L701 = C1_sh[3] & (C1_sh[1] $ C1_sh[2] # !C1_sh[0]) # !C1_sh[3] & C1_sh[1] & C1_sh[2] & C1_sh[0];


--C1L911 is second:inst2|sl~94
--operation mode is normal

C1L911 = C1_sl[3] & (C1_sl[1] $ C1_sl[2] # !C1_sl[0]) # !C1_sl[3] & C1_sl[1] & C1_sl[2] & C1_sl[0];

--C1L021 is second:inst2|sl~105
--operation mode is normal

C1L021 = C1_sl[3] & (C1_sl[1] $ C1_sl[2] # !C1_sl[0]) # !C1_sl[3] & C1_sl[1] & C1_sl[2] & C1_sl[0];


--B1L21 is minute:inst|msh~94
--operation mode is normal

B1L21 = B1_msh[3] & (B1_msh[1] $ B1_msh[2] # !B1_msh[0]) # !B1_msh[3] & B1_msh[1] & B1_msh[2] & B1_msh[0];

--B1L31 is minute:inst|msh~105
--operation mode is normal

B1L31 = B1_msh[3] & (B1_msh[1] $ B1_msh[2] # !B1_msh[0]) # !B1_msh[3] & B1_msh[1] & B1_msh[2] & B1_msh[0];