/******************************************************************************
**
**  COPYRIGHT (C) 2001 Intel Corporation.
**
**  This file and the software in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       Ac97MixerRegsApi.h
**
**  PURPOSE:        Symbolic constants for the AC'97 codec mixer registers.
**                  Separated from Ac97Api.h because of deadlock condition with
**                      XsAc97Api.h
**
**  Valid for    :  Subset of AC '97 Rev 2.1
**
**  $Modtime: 3/28/01 5:31p $ 
******************************************************************************/
#ifndef _AC97MIXERREGSAPI_H
#define _AC97MIXERREGSAPI_H


typedef enum AC97MixerRegisterIdE {

    // Includes symbolic values for certain proprietary register asssignments
    //   in AC'97 devices that might be used with the DM.

    // Valid for subset of R 2.1 specification.
    // Leading "e" in comment means it is an "expanded" register definition as
    //  found in one or more of the Appendices A-D of the R 2.1 specification.
    //  Appendix identifier will immediately follow the "e", such as "eA"
    // R/O indicates read-only
    // Registers not supported by the assumed controller will be commented out.

    AC97_MR_RESET_ID              = 0x00,  // RESET CODEC TO DEFAULT, get ID info
    AC97_MR_MASTER_VOLUME         = 0x02,  // LINE OUT VOLUME
    AC97_MR_HEADPHONE_VOLUME      = 0x04,  //
    AC97_MR_MASTER_VOLUME_MONO    = 0x06,  // 
    AC97_MR_MASTER_TONE_R_L       = 0x08,  // 
    AC97_MR_PC_BEEP_VOLUME        = 0x0A,  // 
    AC97_MR_PHONE_VOLUME          = 0x0C,  // 
    AC97_MR_MIC_VOLUME            = 0x0E,  //   MICROPHONE VOLUME/ AGC
    AC97_MR_LINE_IN_VOLUME        = 0x10,  //   LINE IN VOLUME
    AC97_MR_CD_VOLUME             = 0x12,  // 
    AC97_MR_VIDEO_VOLUME          = 0x14,  // 
    AC97_MR_AUX_VOLUME            = 0x16,  // 
    AC97_MR_PCM_OUT_VOLUME        = 0x18,  //
    AC97_MR_RECORD_SELECT         = 0x1A,  //   SELECT LINE IN OR MICROPHONE
    AC97_MR_RECORD_GAIN           = 0x1C,  //
    AC97_MR_RECORD_GAIN_MIC       = 0x1E,  //
    AC97_MR_GENERAL_PURPOSE       = 0x20,  //
    AC97_MR_CONTROL_3D            = 0x22,  //
//  AC97_MR_RESERVED_0x24         = 0x24,
    AC97_MR_POWERDOWN_CTRL_STAT   = 0x26,  //   POWER MANAGEMENT
    AC97_MR_E_AUDIO_ID            = 0x28,  // eA Extended audio sprt info, R/O
    AC97_MR_E_AUDIO_CTRL_STAT     = 0x2A,  // eA Extended audio stat + control

//
// Audio Sample Rate Control Registers, 0x2C - 0x34
//
                                           // eA PCM Front DAC rate control
    AC97_MR_E_ASR_PCM_FRNT_DAC_RT = 0x2C,  //  (output slots 3, 4, 6)
//  AC97_MR_E_ASR_PCM_SURR_DAC_RT = 0x2E,  // eA PCM Surround DAC rate control
//  AC97_MR_E_ASR_PCM_LFE_DAC_RT  = 0x30,  // eA PCM Surround DAC rate control
    AC97_MR_E_ASR_PCM_LR_ADC_RT   = 0x32,  // eA PCM L+R ADC rate control (3+4)
    AC97_MR_E_ASR_MIC_ADC_RT      = 0x34,  // eA PCM Mic ADC rate control (5)

//  0x36 - 0x38: eA Control registers for the four optional PCM channels
//                 (LFE, CNT, LSR, RSR)
//  AC97_MR_E_6CH_VOL_C_LFE       = 0x36,  // eA
//  AC97_MR_E_6CH_VOL_LR_SURR     = 0x38,  // eA
//  AC97_MR_E_RESERVED_0x3A       = 0x3A,

//
// Rev 2.0 Modem registers
//

// AC97_MR_E_MDEM_ID                = 0x3C,  // eB
// AC97_MR_E_MDM_CTRL_STAT          = 0x3E,  // eB
// AC97_MR_E_MDM_LN1_DAC_ADC_RT     = 0x40,  // eB
// AC97_MR_E_MDM_LN2_DAC_ADC_RT     = 0x42,  // eB
// AC97_MR_E_MDM_HNDST_DAC_ADC_RT   = 0x44,  // eB
// AC97_MR_E_MDM_LN1_DAC_ADC_LVL    = 0x46,  // eB 
// AC97_MR_E_MDM_LN2_DAC_ADC_LVL    = 0x48,  // eB
// AC97_MR_E_MDM_HNDST_DAC_ADC_LVL  = 0x4A,  // eB
// AC97_MR_E_MDM_GPIO_PIN_CNFG      = 0x4C,  // eB
// AC97_MR_E_MDM_GPIO_PIN_POL_TYPE  = 0x4E,  // eB
// AC97_MR_E_MDM_GPIO_PIN_STICKY    = 0x50,  // eB
// AC97_MR_E_MDM_GPIO_PIN_WAKEUP    = 0x52,  // eB
// AC97_MR_E_MDM_GPIO_PIN_STAT      = 0x54,  // eB
// AC97_MR_E_MDM_MISC_AFE_CTRL_STAT = 0x56,  // eB
// AC97_MR_E_RESERVED_0x58          = 0x58,

//
// 5Ah-7Ah: Vendor Reserved
//
    // Cirrus proprietary.  Used in the 4297 codec.
    AC97_MR_4297_REV_FAB_REG      = 0x5A,  // Rev and fab, R/O

    // UCB1400, Philips proprietary.
    AC97_MR_U14_IO_CTRL_STAT  = 0x5A,  // I/O pin level [0..9]. R/W.
    AC97_MR_U14_IO_DIRN       = 0x5C,  // Sets In(0) or Out(1) for I/O pins
    AC97_MR_U14_POS_INT_ENAB  = 0x5E,  // Enables intrpt sgnl on rising edge
    AC97_MR_U14_NEG_INT_ENAB  = 0x60,  // Enables intrpt sgnl on falling edge
    AC97_MR_U14_INT_CLR_STAT  = 0x62,  // Reports intrpt status, W clears stat
    AC97_MR_U14_TS_CTRL       = 0x64,  // Touch Screen Control
    AC97_MR_U14_ADC_CTRL      = 0x66,  // ADC Control
    AC97_MR_U14_ADC_DATA      = 0x68,  // ADC Data
    AC97_MR_U14_FTR_CTRL_STAT1= 0x6A,  // Feature control + status reg 1
    AC97_MR_U14_FTR_CTRL_STAT2= 0x6C,  // Feature control + status reg 2
    AC97_MR_U14_TEST_CTRL     = 0x6E,  // Only in Vendor Specific Test Mode

//
// 7Ch-7Eh: Vendor ID registers.  Optional but standardized for Plug'n'Play
//
    AC97_MR_VENDOR_ID1        = 0x7C,  
    AC97_MR_VENDOR_ID2        = 0x7E,  

    AC97_MR_MAX               = AC97_MR_VENDOR_ID2,

    AC97_MR_END_OF_LIST       = (AC97_MR_MAX +  2)

} AC97MixerRegisterIdT;


#define AC97_NUM_MIXER_REGS  0x40

/*
*  Prototypes
*/

extern UINT32 Ac97CheckRegId (AC97MixerRegisterIdT);

#endif /*_AC97MIXERREGSAPI_H */