?? cf_includes.h
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/*********************************************************************
(c) copyright Freescale Semiconductor Hong Kong Ltd. 2004
ALL RIGHTS RESERVED
*********************************************************************
CF Driver Module for S12 MCUs
*********************************************************************
File: cf_includes.h
Description: Define my System Configuration & Compiler Options.
Date: Mar 2003
Author: Derek Lau
********************************************************************/
#ifndef _H_CF_INCLUDES_ // To avoid multiple defining
#define _H_CF_INCLUDES_ // start of Constants & Macros definition
#include "Hidef.h"
// ======================================================
//
// CF Hardware Info
//
// ======================================================
#ifdef DEMO_BOARD1
#define CFResetPin 0
#define CFResetPort PORTT
#define CFResetDDR DDRT
#endif
#ifdef CUSTOMER_BOARD1
#define CFResetPin 5
#define CFResetPort PORTR
#endif
// ======================================================
//
// Register Definition for CF Module
//
// ======================================================
#define CF_ISR *(volatile muint16*)(CF_BASE+0x00) /* Interface Status Register */
#define CF_ISR_H *(volatile muint8*)(CF_BASE+0x00) /* Interface Status Register */
#define VCC 1
#define CWAIT 0
#define CF_ISR_L *(volatile muint8*)(CF_BASE+0x01) /* Interface Status Register */
#define INPACK 7
#define VS 6
#define RDY 5
#define IOIS16 4
#define CD2 3
#define CD1 2
#define SPKRB 1
#define CHG 0
#define CF_CCR *(volatile muint16*)(CF_BASE+0x02) /* Card Configuration Register */
#define CF_CCR_L *(volatile muint8*)(CF_BASE+0x03) /* Card Configuration Register */
#define CE2B 3
#define CE1B 2
#define REGB 1
#define COM 0
#define CF_SCR1 *(volatile muint16*)(CF_BASE+0x04) /* Status and Control Register 1 */
#define CFE 15
#define CFOE 14
#define CRST 13
#define DISINC 12
#define CFSWAI 11
#define IEDGE 10
#define WERRIE 9
#define TERRIE 8
#define CFRFIE 7
#define CFTEIE 6
#define OOIE 5
#define CIE 4
#define VSIE 3
#define RDYIE 2
#define CHGIE 1
#define CDIE 0
#define CF_SCR2 *(volatile muint16*)(CF_BASE+0x06) /* Status and Control Register 2 */
#define CF_SCR2_H *(volatile muint8*)(CF_BASE+0x06) /* Status and Control Register 2 */
#define CA10E 15
#define CA9E 14
#define CA8E 13
#define CA7E 12
#define CA6E 11
#define CA5E 10
#define CA4E 9
#define CF_SCR2_L *(volatile muint8*)(CF_BASE+0x07) /* Status and Control Register 2 */
#define CF_CR *(volatile muint16*)(CF_BASE+0x08) /* Command Register 1*/
#define CF_CR_L *(volatile muint8*)(CF_BASE+0x09) /* Status and Control Register 2 */
#define HIS 7
#define BSY 6
#define TQ 4
#define RQ 3
#define STOP 2
#define INVOKE 1
#define RWB 0
#define CF_BBAR *(volatile muint16*)(CF_BASE+0x0A) /* Block Base Address Register */
#define CF_BSR *(volatile muint16*)(CF_BASE+0x0C) /* Block Size Register */
/*
#define CF_PMR *(volatile muint16*)(CF_BASE+0x0E) // Power Management Register
#define CF_PMR_L *(volatile muint8*)(CF_BASE+0x0F)
#define CPE 1 // 1 = power on
#define CVS 0 // 1 = 5V, 0 = 3V
*/
#define CF_DR *(volatile muint16*)(CF_BASE+0x10) /* Data Register */
#define CF_DR_H *(volatile muint8*)(CF_BASE+0x10) /* Data Register */
#define CF_DR_L *(volatile muint8*)(CF_BASE+0x11) /* Data Register */
#define CF_IFR *(volatile muint16*)(CF_BASE+0x12) /* Interrupt Flag Register */
#define CF_IFR_H *(volatile muint8*)(CF_BASE+0x12) /* Interrupt Flag Register */
#define WERRIF 1
#define TERRIF 0
#define CF_IFR_L *(volatile muint8*)(CF_BASE+0x13) /* Interrupt Flag Register */
#define CFRFIF 7
#define CFTEIF 6
#define OOIF 5
#define CIF 4
#define VSIF 3
#define RDYIF 2
#define CHGIF 1
#define CDIF 0
// ======================================================
//
// CF Card Definition
//
// ======================================================
#define CF_R_CARD_INFO 0x0000 /* Card Information Structure */
#define CF_R_CONFIG 0x0200 /* Configuration Registratoin */
#define CF_R_CONFIG_STATUS 0x0202 /* Card Status Register */
#define CF_R_PIN_REPLACE 0x0204 /* Pin Replacement Register */
#define CF_R_SOCKET_COPY 0x0206 /* Socket and Copy Register */
#define CF_M_DATA 0x0000
#define CF_M_DATA_ERROR 0x0001
#define CF_M_DATA_FEATURE 0x0001
#define CF_M_ERROR 0x0001
#define CF_M_FEATURE 0x0001
#define CF_M_COUNT_SECTOR 0x0002
#define CF_M_COUNT 0x0002
#define CF_M_SECTOR 0x0003
#define CF_M_CYL_L_H 0x0004
#define CF_M_CYL_L 0x0004
#define CF_M_CYL_H 0x0005
#define CF_M_HEAD_STATUS 0x0006
#define CF_M_HEAD_COMMAND 0x0006
#define CF_M_HEAD 0x0006
#define CF_M_STATUS 0x0007
#define bitCFBUSY 7
#define bitCFRDY 6
#define bitCFDWF 5
#define bitCFDSC 4
#define bitCFDRQ 3
#define bitCFCORR 2
#define bitCFERR 0
#define CF_M_COMMAND 0x0007
#define CF_M_ALT_STATUS_DRIVE 0x000E
#define CF_M_ALT_STATUS 0x000E
#define CF_M_DRIVE 0x000F
#define CF_M_EDATA 0x0400
#define CF_M_ODATA 0x0401
// CF Command Definiation
#define kCFCmdNOP 0x00 // NOP
#define kCFCmdRequestSense 0x03 // request sense
#define kCFCmdReset 0x08 // device reset
#define kCFCmdRead 0x20 // read sectors
#define kCFCmdWrite 0x30 // write sectors
#define kCFCmdWriteVerify 0x3c // write verify
#define kCFCmdPacket 0xa0 // packet command
#define kCFCmdIdentityP 0xa1 // identify packet device
#define kCFCmdService 0xa2 // service command
#define kCFCmdReadMul 0xc4 // read multiple
#define kCFCmdWriteMul 0xc5 // write multiple
#define kCFCmdSetMulti 0xc6 // set multiple mode
#define kCFCmdReadDMAQ 0xc7 // read DMA QUEUED
#define kCFCmdReadDMA 0xc8 // read DMA
#define kCFCmdWriteDMA 0xca // write DMA
#define kCFCmdWriteDMAQ 0xcc // write DMA QUEUED
#define kCFCmdFlushCache 0xe7 // flush cache
#define KCFCmdIdentifyDevice 0xec // identify device
#define kCFCmdSetFeatures 0xef // set features
// Identify [Packet] Device information
#define kCFDevInfoGen 0 // b0=0/1 = 12/16 bit packet len
#define kCFDevInfoModelBeg 27 // Model Number Begin
#define kCFDevInfoModelEnd 46 // Model Number End
#define kCFDevInfoMaxCap 57
#define kCFDevInfoPIO 64 // b[0-7] pio modes supported
#define kCFDevInfoUDMA 88 // b5=udma5..b0=udma0
// ======================================================
//
// CF error code
//
// ======================================================
#define kCFPass 0x0000
#define kCFError 0x0001
#define kCFCRCError 0x0002
#define kCFTimeoutError 0x0003
#define kCFTimeout 10000 // 10 second for ATA timeout
// ===================================================================
//
// CF Specific Types definitions
//
// ===================================================================
typedef muint8 CFErrorCode;
CFErrorCode CF_GetSetDeviceInfo(void);
CFErrorCode CF_IdentifyDevice(muint16 *pBuffer, muint16 XferLen);
CFErrorCode CF_BufferReadMem(muint16 *pBuffer, muint16 XferLen);
CFErrorCode CF_Init(void);
muint16 CF_ReadReg(muint16 Reg);
muint8 CF_Read8Reg(muint16 Reg);
void CF_WriteReg(muint16 Reg, muint16 Data);
void CF_Write8Reg(muint16 Reg, muint8 Data);
muint16 CF_ReadMem(muint16 Mem);
muint16 CF_ReadIO(muint16 Mem);
CFErrorCode CF_IQReadMem(void);
CFErrorCode CF_IQReadMemOneBlock(muint8 pIQUEBuffer);
CFErrorCode CF_IQReadMemTwoBlock(muint8 pIQUEBuffer);
CFErrorCode CF_WriteMem(muint16 Mem, muint16 Data);
void CF_WriteIO(muint16 Mem, muint16 Data);
CFErrorCode CF_IQWriteMem(void);
muint8 CF_Read8Mem(muint16 Mem);
CFErrorCode CF_IQRead8Mem(muint16 Mem);
void CF_Write8Mem(muint16 Mem, muint8 Data);
CFErrorCode CF_IQWrite8Mem(muint16 Mem);
void CF_IQTest(void);
CFErrorCode CF_Command(muint16 *command);
CFErrorCode CF_LBACFCommand1(muint8 Block, muint8 *pLBA, muint8 CFCmd);
CFErrorCode CF_CommandIO(muint16 *command);
CFErrorCode CF_Command8(muint8 *command);
CFErrorCode CF_SCSIInquiry(muint16 *pBuffer,muint8 XferLen);
CFErrorCode CF_SCSIReadCapacity(muint8 *pBuffer);
CFErrorCode CF_LBACFCommand(muint8 Block, muint8 CFCmd);
CFErrorCode CF_WaitCardDRQ(void);
CFErrorCode CF_IQWriteMemOneBlock(muint8 pIQUEBuffer);
CFErrorCode CF_WaitCardBusy(void);
void CF_IQTestSandisk(void);
void CF_IQTest8Sandisk(void);
void CF_TestSandisk(void);
//#define CF_ATA_MODE
#endif _H_CF_INCLUDES_ // end of my Constants & Macros definition
//
// The end of file ata_Includes.h
// *********************************************************************************
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