if (gUSBMSCSWResult)
							break;
					}
				}

				if (!gUSBMSCSWResult)					// no error
				{
					while (mCheckBit(DBEIF,QC34DSR)==0);// wait for last data to send out
					gUSBMSCSWResult = ATA_WaitATABusy();
				}
				QCDCT34 = 0;							// indicate all data xfered
			}
			else
				QCDCT34 = 1;							// indicate not all data xfered

			gATALBA += Block;
		}
		while (Block16 && !gUSBMSCSWResult);


	}
	mUSBSetBit(SNAK,UEPCSR4A);						// disable USB tx
	mSetBit(QnEN,QC1CR);									// enable QC1
	QC1REQ	= kQCREQUSBRx;								// USB Rx
	mClearBit(QnEN,QC4CR);								// disable QC4
	QC4REQ	= kQCREQNone;									// map to non existing resource
	mSetBit(QnPRST,QC3CR);								// reset QC3
	mSet2Bit(DRHE,DTHE,QC34DTR);					// enable force handshake
	mClearBit(QnTHRU,QC3CR);							// disable QC34 passthrough mode

	if (!QCDCT34)													// if all data tx out
		USBMS_SendCSW();
	else	
		USBMS_SetPhyEP5Int(0);							// short packet
}


// ==================================================================
//   SCSILIST2A() -
//
//     Write
//
// ==================================================================
void ATAMS_SCSIList2A()
{
	muint32 i;
	muint16	j;
	muint8	Block;
	muint32	*pLBA;
	muint16	*pBlock16,Block16;

	mClearBit(kLED1Pin,kLED1Port);

	pLBA 	= (muint32*) (gpbCBWPacket+kSCSI10LBAByte3);
	gATALBA 	= *pLBA;
	pBlock16 	= (muint16*) (gpbCBWPacket+kSCSI10XferLength1);
	Block16 	= *pBlock16;

	mUSBClearBit(USBTCIE,UEPCSR4A);			// disable Xfer complete int
	mSetBit(QnPRST,QC1DR);							// reset QC1
	mSetBit(CH12DBE,IQUECR);						// QC12 double buffer
	mSetBit(DBRST,QC12DCR);							// reset QC12 double buffer

//	DisableInterrupts;
	if (mCheckBit(bitATAUDMAMode,gATAStatus))	// UDMA mode
	{

		mClearBit(QnEN,QC3CR);						// disable QC3
		QC3REQ	= kQCREQNone;							// remap to non-exisiting resources
		mSetBit(QnEN,QC2CR);							// enable QC2
		QC2REQ	= kQCREQATATx;						// QC2 = ATA Tx
		mClear2Bit(DRHE,DTHE,QC12DTR);		// disable QC12 force handshake
		mSetBit(QnTHRU,QC1CR);						// QC12 passthrough mode

		do
		{
			if (Block16 & 0xFF00)						// Block > 0xff
			{
				Block = 0xff;
				Block16 -= 0xff;
			}
			else
			{
				Block = (muint8) Block16;
				Block16 = 0;
			}

			gUSBMSCSWResult = ATA_LBAATACommand(Block,kATACmdWriteDMA);
			
			if (!gUSBMSCSWResult)				// no error found
			{

		mUSBClearBit(SNAK,UEPCSR4A);	// enable USB receive

//				Block = *(gpbCBWPacket+kSCSI10XferLength0);
				QCDCT12 = Block;

				if (gUSBFullSpeed)				// full speed
				{
					for (j=0; j<8; j++)
					{
						gUSBMSCSWResult = USBMS_WaitIQUEwithATAIRQ(&QCDCT12);
						if (gUSBMSCSWResult)	// error found
							break;
						QCDCT12 = Block;
					}
					QCDCT12 = 0;		
				}
				else							// high speed
					gUSBMSCSWResult = USBMS_WaitIQUEwithATAIRQ(&QCDCT12);
			}
			gATALBA += Block;
		}
		while (Block16 && !gUSBMSCSWResult);	

		if (!QCDCT12)					// all data xfered
			gUSBMSCSWResult = ATA_WaitATABusy();	// get error including CRC
		else
			mUSBSetBit(STALL,UEPCSR4A);		// stall EP4

//	EnableInterrupts;

		mUSBSetBit(SNAK,UEPCSR4A);		// disable USB receive
		mSetBit(DBRST,QC12DCR);				// reset QC12 double buffer
		mClearBit(CH12DBE,IQUECR);			// set QC12 single buffer
		mClearBit(QnEN,QC2CR);				// disable QC2
		QC2REQ	= kQCREQNone;				// remap QC2 to unused area
		mSetBit(QnPRST,QC1CR);				// reset QC1
		mClearBit(QnTHRU,QC1CR);			// not passthrough
	}
	
	else										// PIO mode
	{
		do
		{
			if (Block16 & 0xFF00)						// Block > 0xff
			{
				Block = 0xff;
				Block16 -= 0xff;
			}
			else
			{
				Block = (muint8) Block16;
				Block16 = 0;
			}

			gUSBMSCSWResult = ATA_LBAATACommand(Block,kATACmdWrite);

			if (!gUSBMSCSWResult)					// no error found
			{
				mUSBClearBit(SNAK,UEPCSR4A);		// enable receive

				for (i=0; i<( (muint16) Block <<kOneByte);i)	// get data
				{
					while (!(QC12DSR & 0x03));		// wait while DBSF == 0

					for (j=0; j<gUSBPacketSize; j++)
					{
						i++;
						ATA_DDR = QC1DR;			// write to ATA
						if (ATA_WaitRegBusy())			
							break;					// error found	

					}
					mSetBit(TXDA, QC12DTR);					// Set Transmit acknowledge
					gUSBMSCSWResult = ATA_WaitATABusy();
					if (gUSBMSCSWResult)
						break;
				}
				if (!gUSBMSCSWResult)
					gUSBMSCSWResult = ATA_WaitATABusy();
			}		
			gATALBA += Block;
		}
		while (Block16 && !gUSBMSCSWResult);	

	}

	USBMS_SendCSW();
}

void ATAMS_SCSIList2F()
{
	gUSBMSCSWResult = 0;
	USBMS_SendCSW();
}

muint8 USBMS_WaitIQUE(volatile muint8* QCxxDCR)
{
	muint16 BegTime, CurTime;

	BegTime = MK_GetCurrentTime();		// begin time

	do
	{
	    if (!*QCxxDCR)
	    	return(kCSWPass);			// exit 
	    	
		CurTime = MK_GetCurrentTime();	// current time
	}
	while ( ((CurTime-BegTime) < kATATimeout) || ((BegTime - CurTime) < kATATimeout));

	gATAError = kSCSISKHardwareError;
	mSetBit(ATAHUT,ATA_DCR_L);
	return(kCSWPhaseError);				// timeout => phase error
}

muint8 USBMS_WaitIQUEwithATAIRQ2(volatile muint8* QCxxDCR)
{
	muint16 BegTime, CurTime;


	BegTime = MK_GetCurrentTime();		// begin time
	do
	{
//	    if ((!*QCxxDCR) && mCheckBit(ATAINTRQ,PORTS))
    if (!*QCxxDCR)
    	return(kCSWPass);			// exit if finish transfer
	    	
		if (mCheckBit(ATAINTRQ,PORTS) && (*QCxxDCR > 2) && (!mCheckBit(6,PORTS)))
		{	
			mSetBit(ATAHUT,ATA_DCR_L);
			return (kCSWFailed);
		}	
		CurTime = MK_GetCurrentTime();	// current time

	}
	while ( ((CurTime-BegTime) < kATATimeout) || ((BegTime - CurTime) < kATATimeout));

	mSetBit(ATAHUT,ATA_DCR_L);
	gATAError = kSCSISKHardwareError;
	return(kCSWPhaseError);				// timeout => phase error
}


muint8 USBMS_WaitIQUEwithATAIRQ(volatile muint8* QCxxDCR)
{
	muint16 BegTime, CurTime;


	BegTime = MK_GetCurrentTime();		// begin time
	do
	{
    if (!*QCxxDCR)
    	return(kCSWPass);			// exit if finish transfer
	    	
		if (mCheckBit(ATAINTRQ,PORTS) && (!mCheckBit(6,PORTS)))
		{	
			mSetBit(ATAHUT,ATA_DCR_L);
			return (kCSWFailed);
		}	
		CurTime = MK_GetCurrentTime();	// current time

	}
	while ( ((CurTime-BegTime) < kATATimeout) || ((BegTime - CurTime) < kATATimeout));

	mSetBit(ATAHUT,ATA_DCR_L);
	gATAError = kSCSISKHardwareError;
	return(kCSWPhaseError);				// timeout => phase error
}


/*
muint8 USBMS_WaitIQUEwithATAIRQ(volatile muint8* QCxxDCR)
{

//	mSetBit(mCheckTimeoutStart,gATATimeoutStatus);
	muint16	i,j;

	DisableInterrupts;
	for (i=0; i<0x1000; i++)
	{
		for (j=0; j<0x4000; j++)
		{

			if ( ((QC12DSR & QC1BP_H & 0x01)) && (*QCxxDCR > 1) )
			{
				while (QC1BP_L < 0xe0)
				{
					if (!mCheckBit(4,PORTS))			// no USB power
					break;
				}
	
				QC2REQ = kQCREQNone;
			}
		

			if (!mCheckBit(4,PORTS))			// no USB power
				UTL_CheckBusPower();
		
			if ( ((QC12DSR & 0x03) == 2) || (*QCxxDCR == 1))
				QC2REQ = kQCREQATATx;
			
			else if (mCheckBit(TFRERR, UEPCSR4B))
				UEPCSR4B = (1<<TFRERR);				// clear error flag

	    else if (!*QCxxDCR)
	    {
	    	EnableInterrupts;
	    	return(kCSWPass);			// exit if finish transfer
	    }
		    	
			else if (mCheckBit(ATAINTRQ,PORTS) && (*QCxxDCR) && (!mCheckBit(6,PORTS)))
			{	
				mSetBit(ATAHUT,ATA_DCR_L);
	    	EnableInterrupts;

				if (*QCxxDCR == 1)
					return(kCSWPass);
				
				asm nop;
				return (kCSWFailed);
			}	

		}
	}
	EnableInterrupts
	mSetBit(ATAHUT,ATA_DCR_L);
	gATAError = kSCSISKHardwareError;
	return(kCSWPhaseError);				// timeout => phase error
}
*/
//
// The end of file usbmb_processor.c 
// *********************************************************************************