?? timing.twr
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Number of Timing Constraints that were not applied: 3Asterisk (*) preceding a constraint indicates it was not met. This may be due to a setup or hold violation.------------------------------------------------------------------------------------------------------ Constraint | Check | Worst Case | Best Case | Timing | Timing | | Slack | Achievable | Errors | Score ------------------------------------------------------------------------------------------------------* PERIOD analysis for net "ep/BU2/U0/pcie_e | SETUP | 0.000ns| 4.000ns| 0| 0 p0/pcie_blk/clocking_i/clkout0" derived f | HOLD | -1.028ns| | 144| 53928 rom NET "sys_clk_c" PERIOD = 10 ns HIGH | | | | | 50% | | | | | ------------------------------------------------------------------------------------------------------* PERIOD analysis for net "ep/BU2/U0/pcie_e | SETUP | 0.000ns| 4.000ns| 0| 0 p0/pcie_blk/clocking_i/clkout0" derived f | HOLD | -1.028ns| | 144| 53928 rom NET "sys_clk_c" PERIOD = 10 ns HIGH | | | | | 50% | | | | | ------------------------------------------------------------------------------------------------------ NET "sys_clk_c" PERIOD = 10 ns HIGH 50% | N/A | N/A| N/A| N/A| N/A------------------------------------------------------------------------------------------------------ TS_MGTCLK = PERIOD TIMEGRP "MGTCLK" 100 M | N/A | N/A| N/A| N/A| N/A Hz HIGH 50% | | | | | ------------------------------------------------------------------------------------------------------ TS_ep_BU2_U0_pcie_ep0_pcie_blk_clocking_i | N/A | N/A| N/A| N/A| N/A _clkout0 = PERIOD TIMEGRP "ep_BU2 | | | | | _U0_pcie_ep0_pcie_blk_clocking_i_clkout0" | | | | | TS_MGTCLK * 2.5 HIGH 50% | | | | | ------------------------------------------------------------------------------------------------------2 constraints not met.INFO:Timing:2761 - N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.
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