Program

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity sygnalizacja is
port(
c: in std_Logic;
piebutton1: in std_logic;
piebutton2: in std_logic;
swiatla: out std_logic_vector(9 downto 0)
);

end sygnalizacja;

architecture a1 of sygnalizacja is
signal licz: integer:=0;
signal zakres: integer:=0;

begin
process(c)
begin
if rising_edge(c) then
licz<=licz+1;
end if;
end process;

process(piebutton1,piebutton2)
begin
if licz<=60 then
if piebutton2='1' then
licz<=61;
else
zakres<=1;
end if;
elsif licz>60 and licz<=70 then
zakres<=2;
elsif licz>70 and licz<=80 then
zakres<=3;
elsif licz>80 and licz<=140 then
if piebutton1='1' then
licz<=141;
else
zakres<=4 ;
end if;
elsif licz>140 and licz<=150 then
zakres<=5 ;
elsif licz>150 then
zakres<=6 ;
if licz=16 then
licz<=0;
end if;
end if;
end if;
case zakres is
when 1 => swiatla <= not("1000010110");
when 2 => swiatla <= not("1000100110");
when 3 => swiatla <= not("1101001010");
when 4 => swiatla <= not("0011001001");
when 5 => swiatla <= not("0101001001");
when 6 => swiatla <= not("1001101010");
when others => null;
end case;
end process;
end a1;