///////////////////////////////////////////////////////////////////////////////////    File Name:  LED_Fader.v//      Version:  2.2//         Date:  05/14/03//        Model:  Fade circuit designed for use with LED_PWM.//                The LED_Fader is designed to take advantage of LED_PWM by//                providing a simple one-bit interface to a PWM controlled LED.//                LED_Fader attaches to a users digital signal on "signal_in",//                and to the LED on LED_out.  The state of signal_in is followed//                on LED_out with a nice fading behavior.  Simply attach clocks.////      Company:  Xilinx, Inc.//  Contributor:  Mike Matera////   Disclaimer:  XILINX IS PROVIDING THIS DESIGN, CODE, OR//                INFORMATION "AS IS" SOLELY FOR USE IN DEVELOPING//                PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY//                PROVIDING THIS DESIGN, CODE, OR INFORMATION AS//                ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,//                APPLICATION OR STANDARD, XILINX IS MAKING NO//                REPRESENTATION THAT THIS IMPLEMENTATION IS FREE//                FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE//                RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY//                REQUIRE FOR YOUR IMPLEMENTATION.  XILINX//                EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH//                RESPECT TO THE ADEQUACY OF THE IMPLEMENTATION,//                INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR//                REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE//                FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES//                OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR//                PURPOSE.////                (c) Copyright 2003 Xilinx, Inc.//                All rights reserved./////////////////////////////////////////////////////////////////////////////////`ifdef LED_FADER `else `define LED_FADER`timescale               100ps/10psmodule LED_Fader ( LED_out, done_out, signal_in, follow_mode_in,                   frame_enable_in, clock_in, reset_in,                   debug_state_out                   );   //-------------------------------------------------------------   //    // Port Summary:   //   // LED_out (synchronous: clock_in)   //    PWM controlled LED output.  This should be connected   //    directly to an IOB that drives an LED.   //   // done_out (synchronous: clock_in)   //    High when the fader has reached a steady-on or    //    steady-off state.  Low when the fader is in transit.   //   // signal_in (synchronous: clock_in)   //    Input signal.  The LED will follow the state of this   //    signal.   //   // follow_mode_in (synchronous: clock_in)   //    1: LED will not complete fade if signal_in changes.   //    0: LED must complete a transition before it becomes   //       sensitive to signal_in again.   //   // frame_enable_in (synchronous: clock_in)   //    A synchronous enable signal that pulses every time   //    the LED is to change intensity.  Good values range   //    from around 4-10 Hz.   //   // reset_in (synchronous: clock_in)   //    Synchronous reset.  Connect this to system reset.   //   // clock_in (clock: buffered)   //    Clock.   //    //-------------------------------------------------------------   output LED_out, done_out;   input  signal_in, frame_enable_in, follow_mode_in, reset_in, clock_in;   output [04:00] debug_state_out;      parameter     RESET_STATE    = 5'b00001,                 ATZERO_STATE   = 5'b00010,                 ATONE_STATE    = 5'b00100,                 GOTOZERO_STATE = 5'b01000,                 GOTOONE_STATE  = 5'b10000;   reg [03:00]   Intensity, Intensity__next;   reg [04:00]   MachineState, MachineState__next;      wire          reset_bit, atzero_bit, atone_bit, gotozero_bit, gotoone_bit;   assign {reset_bit, atzero_bit, atone_bit, gotozero_bit, gotoone_bit} = MachineState;   assign done_out = atzero_bit | atone_bit;   assign debug_state_out = MachineState;      LED_PWM led_pwm       (       .LED_out(LED_out), .intensity_in(Intensity),        .reset_in(reset_in), .clock_in(clock_in)       );   always @ (signal_in or Intensity or MachineState or frame_enable_in or follow_mode_in) begin      MachineState__next <= MachineState;      Intensity__next <= Intensity;      case (MachineState)        RESET_STATE:    MachineState__next <= ATZERO_STATE;             ATZERO_STATE:                           begin                           if (signal_in) MachineState__next <= GOTOONE_STATE;                        end        ATONE_STATE:                            begin                           if (~signal_in) MachineState__next <= GOTOZERO_STATE;                        end        GOTOZERO_STATE:                        begin                           if (frame_enable_in) Intensity__next <= Intensity - 1;                           if (Intensity == 0) MachineState__next <= ATZERO_STATE;                           if (follow_mode_in & signal_in) MachineState__next <= GOTOONE_STATE;                        end        GOTOONE_STATE:                       begin                          if (frame_enable_in) Intensity__next <= Intensity + 1;                          if (Intensity == 15) MachineState__next <= ATONE_STATE;                          if (follow_mode_in & ~signal_in) MachineState__next <= GOTOZERO_STATE;                       end        default:       MachineState__next <= RESET_STATE;      endcase   end      always @ (posedge clock_in) begin      if (reset_in) begin         MachineState <= RESET_STATE;         Intensity <= 0;      end else begin         MachineState <= MachineState__next;         Intensity <= Intensity__next;      end   endendmodule`endif