{ "Info" "ITDB_TSU_RESULT" "stoplight\[6\]~reg0 stop2button buttonclk 6.313 ns register " "Info: tsu for register \"stoplight\[6\]~reg0\" (data pin = \"stop2button\", clock pin = \"buttonclk\") is 6.313 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.030 ns + Longest pin register " "Info: + Longest pin to register delay is 9.030 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.832 ns) 0.832 ns stop2button 1 PIN PIN_T7 3 " "Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_T7; Fanout = 3; PIN Node = 'stop2button'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { stop2button } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.621 ns) + CELL(0.275 ns) 7.728 ns stoplight~892 2 COMB LCCOMB_X61_Y20_N24 3 " "Info: 2: + IC(6.621 ns) + CELL(0.275 ns) = 7.728 ns; Loc. = LCCOMB_X61_Y20_N24; Fanout = 3; COMB Node = 'stoplight~892'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "6.896 ns" { stop2button stoplight~892 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.671 ns) + CELL(0.150 ns) 8.549 ns stoplight~896 3 COMB LCCOMB_X59_Y20_N30 1 " "Info: 3: + IC(0.671 ns) + CELL(0.150 ns) = 8.549 ns; Loc. = LCCOMB_X59_Y20_N30; Fanout = 1; COMB Node = 'stoplight~896'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.821 ns" { stoplight~892 stoplight~896 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.248 ns) + CELL(0.149 ns) 8.946 ns stoplight~897 4 COMB LCCOMB_X59_Y20_N20 1 " "Info: 4: + IC(0.248 ns) + CELL(0.149 ns) = 8.946 ns; Loc. = LCCOMB_X59_Y20_N20; Fanout = 1; COMB Node = 'stoplight~897'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.397 ns" { stoplight~896 stoplight~897 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 9.030 ns stoplight\[6\]~reg0 5 REG LCFF_X59_Y20_N21 6 " "Info: 5: + IC(0.000 ns) + CELL(0.084 ns) = 9.030 ns; Loc. = LCFF_X59_Y20_N21; Fanout = 6; REG Node = 'stoplight\[6\]~reg0'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { stoplight~897 stoplight[6]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.490 ns ( 16.50 % ) " "Info: Total cell delay = 1.490 ns ( 16.50 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.540 ns ( 83.50 % ) " "Info: Total interconnect delay = 7.540 ns ( 83.50 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "9.030 ns" { stop2button stoplight~892 stoplight~896 stoplight~897 stoplight[6]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "9.030 ns" { stop2button stop2button~combout stoplight~892 stoplight~896 stoplight~897 stoplight[6]~reg0 } { 0.000ns 0.000ns 6.621ns 0.671ns 0.248ns 0.000ns } { 0.000ns 0.832ns 0.275ns 0.150ns 0.149ns 0.084ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" {  } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "buttonclk destination 2.681 ns - Shortest register " "Info: - Shortest clock path from clock \"buttonclk\" to destination register is 2.681 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns buttonclk 1 CLK PIN_P1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P1; Fanout = 1; CLK Node = 'buttonclk'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { buttonclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.112 ns buttonclk~clkctrl 2 COMB CLKCTRL_G3 21 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.112 ns; Loc. = CLKCTRL_G3; Fanout = 21; COMB Node = 'buttonclk~clkctrl'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { buttonclk buttonclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.032 ns) + CELL(0.537 ns) 2.681 ns stoplight\[6\]~reg0 3 REG LCFF_X59_Y20_N21 6 " "Info: 3: + IC(1.032 ns) + CELL(0.537 ns) = 2.681 ns; Loc. = LCFF_X59_Y20_N21; Fanout = 6; REG Node = 'stoplight\[6\]~reg0'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.569 ns" { buttonclk~clkctrl stoplight[6]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.29 % ) " "Info: Total cell delay = 1.536 ns ( 57.29 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.145 ns ( 42.71 % ) " "Info: Total interconnect delay = 1.145 ns ( 42.71 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.681 ns" { buttonclk buttonclk~clkctrl stoplight[6]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.681 ns" { buttonclk buttonclk~combout buttonclk~clkctrl stoplight[6]~reg0 } { 0.000ns 0.000ns 0.113ns 1.032ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "9.030 ns" { stop2button stoplight~892 stoplight~896 stoplight~897 stoplight[6]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "9.030 ns" { stop2button stop2button~combout stoplight~892 stoplight~896 stoplight~897 stoplight[6]~reg0 } { 0.000ns 0.000ns 6.621ns 0.671ns 0.248ns 0.000ns } { 0.000ns 0.832ns 0.275ns 0.150ns 0.149ns 0.084ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.681 ns" { buttonclk buttonclk~clkctrl stoplight[6]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.681 ns" { buttonclk buttonclk~combout buttonclk~clkctrl stoplight[6]~reg0 } { 0.000ns 0.000ns 0.113ns 1.032ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "buttonclk lightout\[4\] display:u2\|dp\[4\] 10.067 ns register " "Info: tco from clock \"buttonclk\" to destination pin \"lightout\[4\]\" through register \"display:u2\|dp\[4\]\" is 10.067 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "buttonclk source 2.679 ns + Longest register " "Info: + Longest clock path from clock \"buttonclk\" to source register is 2.679 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns buttonclk 1 CLK PIN_P1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P1; Fanout = 1; CLK Node = 'buttonclk'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { buttonclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.112 ns buttonclk~clkctrl 2 COMB CLKCTRL_G3 21 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.112 ns; Loc. = CLKCTRL_G3; Fanout = 21; COMB Node = 'buttonclk~clkctrl'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { buttonclk buttonclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.537 ns) 2.679 ns display:u2\|dp\[4\] 3 REG LCFF_X62_Y21_N11 1 " "Info: 3: + IC(1.030 ns) + CELL(0.537 ns) = 2.679 ns; Loc. = LCFF_X62_Y21_N11; Fanout = 1; REG Node = 'display:u2\|dp\[4\]'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.567 ns" { buttonclk~clkctrl display:u2|dp[4] } "NODE_NAME" } } { "display.vhd" "" { Text "D:/f6lift/display.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.33 % ) " "Info: Total cell delay = 1.536 ns ( 57.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.143 ns ( 42.67 % ) " "Info: Total interconnect delay = 1.143 ns ( 42.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.679 ns" { buttonclk buttonclk~clkctrl display:u2|dp[4] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.679 ns" { buttonclk buttonclk~combout buttonclk~clkctrl display:u2|dp[4] } { 0.000ns 0.000ns 0.113ns 1.030ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.250 ns + " "Info: + Micro clock to output delay of source is 0.250 ns" {  } { { "display.vhd" "" { Text "D:/f6lift/display.vhd" 15 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.138 ns + Longest register pin " "Info: + Longest register to pin delay is 7.138 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns display:u2\|dp\[4\] 1 REG LCFF_X62_Y21_N11 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X62_Y21_N11; Fanout = 1; REG Node = 'display:u2\|dp\[4\]'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { display:u2|dp[4] } "NODE_NAME" } } { "display.vhd" "" { Text "D:/f6lift/display.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(4.340 ns) + CELL(2.798 ns) 7.138 ns lightout\[4\] 2 PIN PIN_AE11 0 " "Info: 2: + IC(4.340 ns) + CELL(2.798 ns) = 7.138 ns; Loc. = PIN_AE11; Fanout = 0; PIN Node = 'lightout\[4\]'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.138 ns" { display:u2|dp[4] lightout[4] } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.798 ns ( 39.20 % ) " "Info: Total cell delay = 2.798 ns ( 39.20 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.340 ns ( 60.80 % ) " "Info: Total interconnect delay = 4.340 ns ( 60.80 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.138 ns" { display:u2|dp[4] lightout[4] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.138 ns" { display:u2|dp[4] lightout[4] } { 0.000ns 4.340ns } { 0.000ns 2.798ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.679 ns" { buttonclk buttonclk~clkctrl display:u2|dp[4] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.679 ns" { buttonclk buttonclk~combout buttonclk~clkctrl display:u2|dp[4] } { 0.000ns 0.000ns 0.113ns 1.030ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.138 ns" { display:u2|dp[4] lightout[4] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.138 ns" { display:u2|dp[4] lightout[4] } { 0.000ns 4.340ns } { 0.000ns 2.798ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_TH_RESULT" "fuplight\[1\]~reg0 f1upbutton buttonclk 0.813 ns register " "Info: th for register \"fuplight\[1\]~reg0\" (data pin = \"f1upbutton\", clock pin = \"buttonclk\") is 0.813 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "buttonclk destination 2.680 ns + Longest register " "Info: + Longest clock path from clock \"buttonclk\" to destination register is 2.680 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns buttonclk 1 CLK PIN_P1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P1; Fanout = 1; CLK Node = 'buttonclk'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { buttonclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.112 ns buttonclk~clkctrl 2 COMB CLKCTRL_G3 21 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.112 ns; Loc. = CLKCTRL_G3; Fanout = 21; COMB Node = 'buttonclk~clkctrl'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { buttonclk buttonclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.031 ns) + CELL(0.537 ns) 2.680 ns fuplight\[1\]~reg0 3 REG LCFF_X63_Y21_N31 7 " "Info: 3: + IC(1.031 ns) + CELL(0.537 ns) = 2.680 ns; Loc. = LCFF_X63_Y21_N31; Fanout = 7; REG Node = 'fuplight\[1\]~reg0'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { buttonclk~clkctrl fuplight[1]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.31 % ) " "Info: Total cell delay = 1.536 ns ( 57.31 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.144 ns ( 42.69 % ) " "Info: Total interconnect delay = 1.144 ns ( 42.69 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[1]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[1]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.266 ns + " "Info: + Micro hold delay of destination is 0.266 ns" {  } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.133 ns - Shortest pin register " "Info: - Shortest pin to register delay is 2.133 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns f1upbutton 1 PIN PIN_N25 4 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N25; Fanout = 4; PIN Node = 'f1upbutton'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { f1upbutton } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(0.150 ns) 2.049 ns fuplight\[1\]~896 2 COMB LCCOMB_X63_Y21_N30 1 " "Info: 2: + IC(0.900 ns) + CELL(0.150 ns) = 2.049 ns; Loc. = LCCOMB_X63_Y21_N30; Fanout = 1; COMB Node = 'fuplight\[1\]~896'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.050 ns" { f1upbutton fuplight[1]~896 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 2.133 ns fuplight\[1\]~reg0 3 REG LCFF_X63_Y21_N31 7 " "Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 2.133 ns; Loc. = LCFF_X63_Y21_N31; Fanout = 7; REG Node = 'fuplight\[1\]~reg0'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { fuplight[1]~896 fuplight[1]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.233 ns ( 57.81 % ) " "Info: Total cell delay = 1.233 ns ( 57.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.900 ns ( 42.19 % ) " "Info: Total interconnect delay = 0.900 ns ( 42.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.133 ns" { f1upbutton fuplight[1]~896 fuplight[1]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.133 ns" { f1upbutton f1upbutton~combout fuplight[1]~896 fuplight[1]~reg0 } { 0.000ns 0.000ns 0.900ns 0.000ns } { 0.000ns 0.999ns 0.150ns 0.084ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[1]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[1]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.133 ns" { f1upbutton fuplight[1]~896 fuplight[1]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.133 ns" { f1upbutton f1upbutton~combout fuplight[1]~896 fuplight[1]~reg0 } { 0.000ns 0.000ns 0.900ns 0.000ns } { 0.000ns 0.999ns 0.150ns 0.084ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}