?? bin_to_gray.vhd
字號:
-- 二進制碼->格雷碼(編碼):
-- 從最右邊一位起,依次將每一位與左邊一位異或(XOR),
-- 作為對應格雷碼該位的值,最左邊一位不變.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
entity bin_to_gray is
generic (n : integer := 3);
port (
reset : in std_logic;
bin : in std_logic_vector(n downto 0);
gray : out std_logic_vector(n downto 0)
);
end bin_to_gray;
architecture behav of bin_to_gray is
signal temp1,temp2 : std_logic_vector(n downto 0);
begin
temp1 <= bin;
process(reset,temp1)
variable i : integer range 0 to n-1 := 0;
begin
if reset = '1' then
temp2 <= (others => '0');
else
for i in 0 to n-1 loop
temp2(i) <= temp1(i+1) xor temp1(i);
end loop;
temp2(n) <= temp1(n);
end if;
end process;
gray <= temp2;
end behav;
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