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?? lcd.fit.eqn

?? 利用verilogＨＤＬ語言實(shí)現(xiàn)ＬＣＤ的驅(qū)動(dòng)編程
?? EQN
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A1L59 = !state.s11 & !state.s13;


--A1L66 is Select~3485 at LC3_C33
--operation mode is normal

A1L66 = !A1L56 & (A1L5 & (addr[2]) # !A1L5 & E3_cs_buffer[2]);

--A1L69 is Select~3526 at LC3_C33
--operation mode is normal

A1L69 = !A1L56 & (A1L5 & (addr[2]) # !A1L5 & E3_cs_buffer[2]);


--A1L76 is Select~3486 at LC4_C28
--operation mode is normal

A1L76 = !state.s16 & !state.s18;

--A1L79 is Select~3527 at LC4_C28
--operation mode is normal

A1L79 = !state.s16 & !state.s18;


--A1L86 is Select~3487 at LC5_C33
--operation mode is normal

A1L86 = !A1L76 & (A1L4 & (E3_cs_buffer[2]) # !A1L4 & addr[2]);

--A1L89 is Select~3528 at LC5_C33
--operation mode is normal

A1L89 = !A1L76 & (A1L4 & (E3_cs_buffer[2]) # !A1L4 & addr[2]);


--A1L763 is reduce_or~97 at LC2_C32
--operation mode is normal

A1L763 = !A1L463 # !A1L563;

--A1L173 is reduce_or~101 at LC2_C32
--operation mode is normal

A1L173 = !A1L463 # !A1L563;


--A1L96 is Select~3488 at LC1_C33
--operation mode is normal

A1L96 = A1L86 # A1L66 # !A1L763 & addr[2];

--A1L99 is Select~3529 at LC1_C33
--operation mode is normal

A1L99 = A1L86 # A1L66 # !A1L763 & addr[2];


--E3_cs_buffer[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC3_C36
--operation mode is arithmetic

E3_cs_buffer[3] = addr[3] $ E3_cout[2];

--E3L31 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~69 at LC3_C36
--operation mode is arithmetic

E3L31 = addr[3] $ E3_cout[2];

--E3_cout[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] at LC3_C36
--operation mode is arithmetic

E3_cout[3] = CARRY(addr[3] & E3_cout[2]);


--A1L07 is Select~3493 at LC2_C27
--operation mode is normal

A1L07 = !A1L56 & (A1L5 & (addr[3]) # !A1L5 & E3_cs_buffer[3]);

--A1L001 is Select~3530 at LC2_C27
--operation mode is normal

A1L001 = !A1L56 & (A1L5 & (addr[3]) # !A1L5 & E3_cs_buffer[3]);


--A1L17 is Select~3494 at LC3_C27
--operation mode is normal

A1L17 = !A1L76 & (A1L4 & (E3_cs_buffer[3]) # !A1L4 & addr[3]);

--A1L101 is Select~3531 at LC3_C27
--operation mode is normal

A1L101 = !A1L76 & (A1L4 & (E3_cs_buffer[3]) # !A1L4 & addr[3]);


--A1L27 is Select~3495 at LC4_C27
--operation mode is normal

A1L27 = A1L17 # A1L07 # !A1L763 & addr[3];

--A1L201 is Select~3532 at LC4_C27
--operation mode is normal

A1L201 = A1L17 # A1L07 # !A1L763 & addr[3];


--E3_cs_buffer[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC1_C36
--operation mode is arithmetic

E3_cs_buffer[1] = addr[0] $ addr[1];

--E3L9 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~70 at LC1_C36
--operation mode is arithmetic

E3L9 = addr[0] $ addr[1];

--E3_cout[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] at LC1_C36
--operation mode is arithmetic

E3_cout[1] = CARRY(addr[0] & addr[1]);


--A1L37 is Select~3496 at LC6_C33
--operation mode is normal

A1L37 = !A1L56 & (A1L5 & (addr[1]) # !A1L5 & E3_cs_buffer[1]);

--A1L301 is Select~3533 at LC6_C33
--operation mode is normal

A1L301 = !A1L56 & (A1L5 & (addr[1]) # !A1L5 & E3_cs_buffer[1]);


--A1L47 is Select~3497 at LC7_C33
--operation mode is normal

A1L47 = !A1L76 & (A1L4 & (E3_cs_buffer[1]) # !A1L4 & addr[1]);

--A1L401 is Select~3534 at LC7_C33
--operation mode is normal

A1L401 = !A1L76 & (A1L4 & (E3_cs_buffer[1]) # !A1L4 & addr[1]);


--A1L57 is Select~3498 at LC8_C33
--operation mode is normal

A1L57 = A1L47 # A1L37 # !A1L763 & addr[1];

--A1L501 is Select~3535 at LC8_C33
--operation mode is normal

A1L501 = A1L47 # A1L37 # !A1L763 & addr[1];


--A1L732 is data~4509 at LC2_A3
--operation mode is normal

A1L732 = rst & !state.s9 # !rst & (A1L471Q $ !A1L761Q);

--A1L113 is data~4626 at LC2_A3
--operation mode is normal

A1L113 = rst & !state.s9 # !rst & (A1L471Q $ !A1L761Q);


--A1L832 is data~4510 at LC3_A36
--operation mode is normal

A1L832 = A1L871Q & (!rst # !state.s19) # !A1L732;

--A1L213 is data~4627 at LC3_A36
--operation mode is normal

A1L213 = A1L871Q & (!rst # !state.s19) # !A1L732;


--A1L932 is data~4511 at LC6_A36
--operation mode is normal

A1L932 = !A1L832 & (A1L122 # !xpage[0] # !rst);

--A1L313 is data~4628 at LC6_A36
--operation mode is normal

A1L313 = !A1L832 & (A1L122 # !xpage[0] # !rst);

--A1L413 is data~4629 at LC6_A36
--operation mode is normal

A1L413 = !A1L832 & (A1L122 # !xpage[0] # !rst);


--A1L32 is Mux~526 at LC4_A36
--operation mode is normal

A1L32 = addr[3] & (!addr[1] & !addr[0] # !addr[2]) # !addr[3] & (addr[2] # addr[1]);

--A1L94 is Mux~552 at LC4_A36
--operation mode is normal

A1L94 = addr[3] & (!addr[1] & !addr[0] # !addr[2]) # !addr[3] & (addr[2] # addr[1]);


--A1L42 is Mux~527 at LC8_A36
--operation mode is normal

A1L42 = !addr[3] & (addr[2] & !addr[1] # !addr[2] & (addr[1] # addr[0]));

--A1L05 is Mux~553 at LC8_A36
--operation mode is normal

A1L05 = !addr[3] & (addr[2] & !addr[1] # !addr[2] & (addr[1] # addr[0]));


--A1L042 is data~4512 at LC6_A26
--operation mode is normal

A1L042 = rst & (addr[4] & (state.s13) # !addr[4] & state.s18);

--A1L513 is data~4630 at LC6_A26
--operation mode is normal

A1L513 = rst & (addr[4] & (state.s13) # !addr[4] & state.s18);


--A1L562 is data~4562 at LC7_A36
--operation mode is normal

A1L562 = (A1L042 & !A1L42 & (!A1L32 # !A1L512) # !A1L042 & (!A1L32 # !A1L512)) & CASCADE(A1L413);

--A1L613 is data~4631 at LC7_A36
--operation mode is normal

A1L613 = (A1L042 & !A1L42 & (!A1L32 # !A1L512) # !A1L042 & (!A1L32 # !A1L512)) & CASCADE(A1L413);


--A1L52 is Mux~528 at LC6_A27
--operation mode is normal

A1L52 = addr[3] & (!addr[1] # !addr[2]) # !addr[3] & (addr[2] & (addr[0]) # !addr[2] & addr[1] & !addr[0]);

--A1L15 is Mux~554 at LC6_A27
--operation mode is normal

A1L15 = addr[3] & (!addr[1] # !addr[2]) # !addr[3] & (addr[2] & (addr[0]) # !addr[2] & addr[1] & !addr[0]);


--A1L662 is data~4563 at LC5_A35
--operation mode is normal

A1L662 = (A1L52 & !A1L042 & (!A1L462 # !A1L012) # !A1L52 & (!A1L462 # !A1L012)) & CASCADE(A1L643);

--A1L713 is data~4632 at LC5_A35
--operation mode is normal

A1L713 = (A1L52 & !A1L042 & (!A1L462 # !A1L012) # !A1L52 & (!A1L462 # !A1L012)) & CASCADE(A1L643);


--A1L142 is data~4517 at LC4_A34
--operation mode is normal

A1L142 = addr[3] & !addr[2] & (A1L132) # !addr[3] & addr[2] & A1L202;

--A1L813 is data~4633 at LC4_A34
--operation mode is normal

A1L813 = addr[3] & !addr[2] & (A1L132) # !addr[3] & addr[2] & A1L202;


--A1L762 is data~4564 at LC3_A34
--operation mode is normal

A1L762 = (addr[1] # !A1L142 # !addr[0] # !rst) & CASCADE(A1L353);

--A1L913 is data~4634 at LC3_A34
--operation mode is normal

A1L913 = (addr[1] # !A1L142 # !addr[0] # !rst) & CASCADE(A1L353);


--A1L242 is data~4519 at LC6_A7
--operation mode is normal

A1L242 = !A1L322 & (state.s19 & rst # !A1L091Q);

--A1L023 is data~4635 at LC6_A7
--operation mode is normal

A1L023 = !A1L322 & (state.s19 & rst # !A1L091Q);

--A1L123 is data~4636 at LC6_A7
--operation mode is normal

A1L123 = !A1L322 & (state.s19 & rst # !A1L091Q);


--A1L862 is data~4565 at LC7_A7
--operation mode is normal

A1L862 = (addr[0] & (addr[1] # !addr[2]) # !addr[0] & (addr[2] # !addr[1]) # !A1L602) & CASCADE(A1L123);

--A1L223 is data~4637 at LC7_A7
--operation mode is normal

A1L223 = (addr[0] & (addr[1] # !addr[2]) # !addr[0] & (addr[2] # !addr[1]) # !A1L602) & CASCADE(A1L123);


--A1L62 is Mux~529 at LC5_A31
--operation mode is normal

A1L62 = addr[3] & (addr[2] & !addr[1] & !addr[0] # !addr[2] & addr[1] & addr[0]) # !addr[3] & addr[1] & (addr[2] $ !addr[0]);

--A1L25 is Mux~555 at LC5_A31
--operation mode is normal

A1L25 = addr[3] & (addr[2] & !addr[1] & !addr[0] # !addr[2] & addr[1] & addr[0]) # !addr[3] & addr[1] & (addr[2] $ !addr[0]);


--A1L72 is Mux~530 at LC4_A27
--operation mode is normal

A1L72 = !addr[3] & addr[2] & (addr[1] $ !addr[0]);

--A1L35 is Mux~556 at LC4_A27
--operation mode is normal

A1L35 = !addr[3] & addr[2] & (addr[1] $ !addr[0]);


--A1L342 is data~4521 at LC6_A31
--operation mode is normal

A1L342 = A1L72 & (state.s16 # A1L62 & state.s11) # !A1L72 & A1L62 & state.s11;

--A1L323 is data~4638 at LC6_A31
--operation mode is normal

A1L323 = A1L72 & (state.s16 # A1L62 & state.s11) # !A1L72 & A1L62 & state.s11;


--A1L442 is data~4522 at LC1_A27
--operation mode is normal

A1L442 = rst & addr[1] & (state.s13 # state.s18);

--A1L423 is data~4639 at LC1_A27
--operation mode is normal

A1L423 = rst & addr[1] & (state.s13 # state.s18);


--A1L542 is data~4523 at LC5_A27
--operation mode is normal

A1L542 = A1L442 & (addr[2] & !addr[3] & addr[0] # !addr[2] & addr[3]);

--A1L523 is data~4640 at LC5_A27
--operation mode is normal

A1L523 = A1L442 & (addr[2] & !addr[3] & addr[0] # !addr[2] & addr[3]);


--A1L642 is data~4524 at LC3_A31
--operation mode is normal

A1L642 = !A1L542 & (!A1L342 # !addr[4] # !rst);

--A1L623 is data~4641 at LC3_A31
--operation mode is normal

A1L623 = !A1L542 & (!A1L342 # !addr[4] # !rst);

--A1L723 is data~4642 at LC3_A31
--operation mode is normal

A1L723 = !A1L542 & (!A1L342 # !addr[4] # !rst);


--A1L82 is Mux~531 at LC5_A26
--operation mode is normal

A1L82 = addr[3] # addr[0] # !addr[2] & addr[4];

--A1L45 is Mux~557 at LC5_A26
--operation mode is normal

A1L45 = addr[3] # addr[0] # !addr[2] & addr[4];


--A1L92 is Mux~532 at LC7_A26
--operation mode is normal

A1L92 = !addr[3] & !addr[0] & (addr[2] # addr[4]);

--A1L55 is Mux~558 at LC7_A26
--operation mode is normal

A1L55 = !addr[3] & !addr[0] & (addr[2] # addr[4]);


--A1L742 is data~4525 at LC3_A26
--operation mode is normal

A1L742 = A1L92 & (A1L82 & state.s13) # !A1L92 & (state.s18 # A1L82 & state.s13);

--A1L823 is data~4643 at LC3_A26
--operation mode is normal

A1L823 = A1L92 & (A1L82 & state.s13) # !A1L92 & (state.s18 # A1L82 & state.s13);


--A1L842 is data~4526 at LC7_A31
--operation mode is normal

A1L842 = A1L72 & (state.s11 # A1L62 & state.s16) # !A1L72 & A1L62 & state.s16;

--A1L923 is data~4644 at LC7_A31
--operation mode is normal

A1L923 = A1L72 & (state.s11 # A1L62 & state.s16) # !A1L72 & A1L62 & state.s16;


--A1L942 is data~4527 at LC8_A31
--operation mode is normal

A1L942 = !addr[4] & rst & A1L842;

--A1L033 is data~4645 at LC8_A31
--operation mode is normal

A1L033 = !addr[4] & rst & A1L842;


--A1L962 is data~4566 at LC4_A31
--operation mode is normal

A1L962 = (!A1L942 & (addr[1] # !rst # !A1L742)) & CASCADE(A1L723);

--A1L133 is data~4646 at LC4_A31
--operation mode is normal

A1L133 = (!A1L942 & (addr[1] # !rst # !A1L742)) & CASCADE(A1L723);


--A1L072 is data~4567 at LC7_A30
--operation mode is normal

A1L072 = (!state.s7 & !state.s3 & (A1L122 # !xpage[6])) & CASCADE(A1L753);

--A1L233 is data~4647 at LC7_A30
--operation mode is normal

A1L233 = (!state.s7 & !state.s3 & (A1L122 # !xpage[6])) & CASCADE(A1L753);


--A1L03 is Mux~533 at LC7_C34
--operation mode is normal

A1L03 = addr[2] & (addr[1] # addr[4] & !addr[0]) # !addr[2] & !addr[4] & !addr[1] & addr[0];

--A1L65 is Mux~559 at LC7_C34
--operation mode is normal

A1L65 = addr[2] & (addr[1] # addr[4] & !addr[0]) # !addr[2] & !addr[4] & !addr[1] & addr[0];


--A1L13 is Mux~534 at LC8_C34
--operation mode is normal

A1L13 = addr[2] & (addr[1] # !addr[4] & !addr[0]) # !addr[2] & addr[4] & !addr[1] & addr[0];

--A1L75 is Mux~560 at LC8_C34
--operation mode is normal

A1L75 = addr[2] & (addr[1] # !addr[4] & !addr[0]) # !addr[2] & addr[4] & !addr[1] & addr[0];


--A1L052 is data~4531 at LC6_C34
--operation mode is normal

A1L052 = A1L13 & (state.s18 # A1L03 & state.s13) # !A1L13 & A1L03 & state.s13;

--A1L333 is data~4648 at LC6_C34
--operation mode is normal

A1L333 = A1L13 & (state.s18 # A1L03 & state.s13) # !A1L13 & A1L03 & state.s13;


--A1L23 is Mux~535 at LC1_C34
--operation mode is normal

A1L23 = addr[2] & !addr[3] & (addr[4] $ addr[0]) # !addr[2] & (!addr[4] & addr[0]);

--A1L85 is Mux~561 at LC1_C34
--operation mode is normal

A1L85 = addr[2] & !addr[3] & (addr[4] $ addr[0]) # !addr[2] & (!addr[4] & addr[0]);


--A1L33 is Mux~536 at LC1_C30
--operation mode is normal

A1L33 = addr[2] & !addr[3] & (addr[4] $ !addr[0]) # !addr[2] & (addr[4] & addr[0]);

--A1L95 is Mux~562 at LC1_C30
--operation mode is normal

A1L95 = addr[2] & !addr[3] & (addr[4] $ !addr[0]) # !addr[2] & (addr[4] & addr[0]);


--A1L152 is data~4532 at LC3_C30
--operation mode is normal

A1L152 = A1L33 & (state.s16 # A1L23 & state.s11) # !A1L33 & A1L23 & state.s11;

--A1L433 is data~4649 at LC3_C30
--operation mode is normal

A1L433 = A1L33 & (state.s16 # A1L23 & state.s11) # !A1L33 & A1L23 & state.s11;


--A1L252 is data~4533 at LC6_C30
--operation mode is normal

A1L252 = rst & addr[1] & A1L152;

--A1L533 is data~4650 at LC6_C30
--operation mode is normal

A1L533 = rst & addr[1] & A1L152;


--A1L352 is data~4534 at LC7_C30
--operation mode is normal

A1L352 = A1L602 & (!addr[1] # !addr[0] # !addr[2]);

--A1L633 is data~4651 at LC7_C30
--operation mode is normal

A1L633 = A1L602 & (!addr[1] # !addr[0] # !addr[2]);

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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