?? 22_deadlock.vhd
字號:
--Page : 282
--Objective : Infinite oscillation in delta time domain
--Filename :test_13
--Author :Joseph Pick
entity Test_13 is
end Test_13;
architecture Behave_1 of Test_13 is
signal A : NATURAL :=1;
signal B : NATURAL :=1;
begin
Inc_A:
process
begin
A<=A+1;
wait on B;
if(Now > 0 ns) then
assert FALSE
report "Absolute simulation time has processed : Inc_A"
severity NOTE;
end if;
end process;
Inc_B:
process
begin
wait on A;
if(Now > 0 ns ) then
assert FALSE
report "Absolute simulation time has processed : Inc_A"
severity NOTE;
end if;
B <=B+1;
end process;
Finish:
process
begin
wait for 100 ns;
assert false report "End of Simulation"
severity Error;
end process Finish;
end Behave_1;
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