?? controller.vhd
字號:
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY controller IS
PORT (Hold, Reset, Clk : IN STD_LOGIC;
Num : IN Integer Range 0 To 49;
GA,GB,YA,YB,RA,RB :out STD_LOGIC);
END controller;
ARCHITECTURE controller_architecture OF controller IS
TYPE STATE_TYPE IS(S0,S1,S2,S3);
SIGNAL State:STATE_TYPE;
BEGIN
Change_State: -- 狀態機狀態轉換進程
PROCESS (reset, clk, state, num)
BEGIN
IF (reset='1') THEN state <= S0;
ELSIF ( falling_edge(clk) ) THEN --計數器是上升沿改變計數值,此處用下降沿讀取
CASE state IS
WHEN S0 => IF (num=20) THEN state <=S1; END IF; WHEN S1 => IF (num=25) THEN state <=S2; END IF;
WHEN S2 => IF (num=45) THEN state <=S3; END IF;
WHEN S3 => IF (num= 0 ) THEN state <=S0; END IF;
END CASE;
END IF;
END PROCESS;
Output_Process: -- 輸出值進程
Process (hold, state)
BEGIN
If (hold='1') Then -- 出現特殊情況,亮紅燈
RA <= '1'; GA <= '0'; YA <= '0';
RB <= '1'; GB <= '0'; YB <= '0';
Else
CASE state Is
When S0 => GA <= '1'; YA <= '0'; RA <= '0';
RB <= '1'; GB <= '0'; YB <= '0';
When S1 => GA <= '0'; YA <= '1'; RA <= '0';
RB <= '1'; GB <= '0'; YB <= '0';
When S2 => GA <= '0'; YA <= '0'; RA <= '1';
RB <= '0'; GB <= '1'; YB <= '0';
When S3 => GA <= '0'; YA <= '0'; RA <= '1';
RB <= '0'; GB <= '0'; YB <= '1';
END CASE;
END IF;
END Process;
END controller_architecture;
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