---任意奇分頻器，晶振不同就用不同的參數LIBRARY ieee;USE ieee.std_logic_1164.all;USE ieee.std_logic_arith.all;ENTITY baud IS    generic( N:integer:=325);  PORT(clkin:in std_logic;--		 rst  :in std_logic;       clkout:out std_logic);END ENTITY;ARCHITECTURE devider OF baud IS  SIGNAL counter:integer RANGE 0 TO N   :=0;   --fredevider(N+1);SIGNAL temp1:std_logic         :='0';SIGNAL temp2:std_logic         :='0';BEGIN  PROCESS(clkin)    BEGIN--	 if rst='1' then      IF clkin'event AND clkin='1' THEN         IF counter=N THEN            counter<=0;            temp1<=NOT temp1;         ELSE             counter<=counter+1;         END IF;      END IF;         IF clkin'event AND clkin='0' THEN         IF counter=N/2 THEN            temp2<=NOT temp2;         END IF;      END IF;--	else--		counter<=0;--		temp1<='0';--		temp2<='0';--	end if;  END PROCESS;    clkout<=temp1 XOR temp2;END devider;----奇分頻電路，修改常數N，可以將原頻率分為1/(N+1);