?? anal.out
字號(hào):
E:/vhdl_tools/100Examples/1_ADDER/1_ADDER.VHD:
pout <= in1+in2;
^
**Error: E:/vhdl_tools/100Examples/1_ADDER/1_ADDER.VHD line 15
Type mismatch on left and/or right operand of binary operator. (VSS-523)
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