?? a.vhd
字號:
IF(to_integer(unsigned(small_count)) = 1) THEN
ba_sig <= addr_from_up(23 downto 22) ;
command_bus <= precharge;
addr_sig <= addr_sig;
rd_wr_just_terminated <= '1';
ELSIF(to_integer(unsigned(small_count)) = trp) THEN
ba_sig <= ba_sig;
command_bus <= nop;
rd_wr_just_terminated <= '0';
addr_sig <= addr_sig;
ELSE
ba_sig <= ba_sig;
command_bus <= nop;
addr_sig <= addr_sig;
rd_wr_just_terminated <= rd_wr_just_terminated;
END IF;
----------------------------------------------------
--dram auto_refereshes
----------------------------------------------------
ELSIF(auto_ref_pending = '1') THEN
--perform auto ref, and decrement auto ref counter
IF (small_all_zeros = '1')THEN
--IF (to_integer(unsigned(small_count)) = trp)THEN
command_bus <= auto_ref;
--auto_ref_in_prog <= '1';
one_auto_ref_complete <= '0';
ELSIF ((to_integer(unsigned(small_count)) = trfc)) THEN
command_bus <= nop;
one_auto_ref_complete <= '1';
--auto_ref_in_prog <= '0';
ELSE
command_bus <= nop;
one_auto_ref_complete <= '0';
--auto_ref_in_prog <= auto_ref_in_prog;
END IF;
----------------------------------------------------
--dram auto_refereshes Ends
----------------------------------------------------
--ELSIF(auto_ref_pending = '0') THEN
END IF; --(if dram_init_done_s = '1')
END IF; --IF(reset = '1')
END IF; --IF(RISING_EDGE(clk_in))
END PROCESS init_reg;
--##############################################################################
-- Process:
--##############################################################################
reset_del_count_gen_reg: PROCESS(clk_in)
BEGIN
IF(RISING_EDGE(clk_in)) THEN
dram_init_done_s_del <= dram_init_done_s;
END IF;
END PROCESS reset_del_count_gen_reg;
--generate a pulse on reset_del_count while dram_init_done_s goes high
reset_del_count <= dram_init_done_s AND not(dram_init_done_s_del);
--##############################################################################
-- Process:
--##############################################################################
gen_auto_ref_pending_cmb: PROCESS (no_of_refs_needed)
BEGIN
IF(to_integer(unsigned(no_of_refs_needed)) = 0) THEN
auto_ref_pending <= '0';
ELSE
auto_ref_pending <= '1';
END IF;
END PROCESS gen_auto_ref_pending_cmb;
--##############################################################################
-- Process: This process is responsible for generating counts for
-- producing delays after a command is issued to the dram
-- to ensure the various timing requirements for the dram
-- It is thaught that this counter is reset as soon as
-- any command is issued, therafter we can produce delays
-- w.r.t the count held in this register
-- since a command is characterized by command_bus(4)
-- command_bus(3) and command_bus(2), if any of them is
-- '0', we will reset this counter.
-- This counter will be free running.
--##############################################################################
small_count_reg: PROCESS(clk_in,reset)
VARIABLE all_ones: std_logic;
BEGIN
IF(reset = '1') THEN
small_count <= (others => '0');
ELSIF(RISING_EDGE(clk_in)) THEN
--IF((command_bus(2) = '0') OR (command_bus(3) = '0')
--OR (command_bus(4) = '0')) THEN
all_ones := small_count(0);
FOR i in 1 to len_small - 1 LOOP
all_ones := all_ones AND small_count(i);
END LOOP;
IF((one_auto_ref_time_done = '1' AND wr_n_from_up = '1'
AND rd_n_from_up = '1') OR
--above means when there is no read or write cycle going on
--then only auto ref events happen
(one_auto_ref_complete = '1' AND wr_n_from_up = '1'
AND rd_n_from_up = '1') OR
--above means when there is no read or write cycle going on
--then only auto ref events happen
(wr_n_from_up_del_1 = '0' AND rd_n_from_up = '1'
AND wr_n_from_up = '1') OR
--the above means, that its just that a read or write is
--over
(wr_n_from_up_pulse = '1') OR
( (to_integer(unsigned(small_count)) = trp) AND
(rd_wr_just_terminated = '1') )
) THEN
--the above means, that just after the read and wirte is over
--the issued precharge command is also over, the small counter
--needs to be reset, in order to count for an auto_ref cycle.
--In summary the reset of the small_count will be performed
--1) In auto referesh mode, at each referesh compete
--2) During write operation to count the trcd which is the wait
--3) During read operation to count the trcd which is the wait
-- Time after ACTIVE COMMAND
--4) Just after READ/WRITE command is over, for PRECHARGE op
--5).Just after READ/WRITE command is over and PRECHARGE is also
--over, so that it starts fresh counting for A_REF.
small_count <= (others => '0');
ELSIF(all_ones = '1') THEN
small_count <= small_count;
ELSE
--Let the small_count until it reaches its max value
--where it will hang and wait for further reset command issued
--As written above
--IF((wr_n_from_up = '0') OR (rd_n_from_up = '0')
--OR (auto_ref_pending = '1')) THEN
small_count <= incr_vec(small_count);
--ELSE
-- small_count <= small_count;
--END IF;
END IF; -- IF(all_ones = '1')
--END IF; --((command_bus(2) = '0')...
END IF; --reset
--END IF; --(RISING_EDGE(clk_in))
END PROCESS small_count_reg;
--##############################################################################
-- Process:
--##############################################################################
gen_small_all_zeros_cmb: PROCESS (small_count)
VARIABLE small_all_zeros_var: std_logic;
BEGIN
small_all_zeros_var := small_count(0);
FOR i in 1 to len_small - 1 LOOP
small_all_zeros_var := small_all_zeros_var OR small_count(i);
END LOOP;
small_all_zeros <= not(small_all_zeros_var);
END PROCESS gen_small_all_zeros_cmb;
--##############################################################################
-- Process:
--##############################################################################
wr_n_from_up_del_reg: PROCESS(clk_in)
BEGIN
IF(RISING_EDGE(clk_in)) THEN
wr_n_from_up_del_1 <= wr_n_from_up AND rd_n_from_up;
wr_n_from_up_del_2 <= wr_n_from_up_del_1;
END IF;
END PROCESS wr_n_from_up_del_reg;
wr_n_from_up_pulse <= not(wr_n_from_up AND rd_n_from_up)
AND (wr_n_from_up_del_1);
--wr_n_from_up_pulse <= not(wr_n_from_up_del_1) AND (wr_n_from_up_del_2);
--##############################################################################
-- Process:
--##############################################################################
dram_busy_gen: PROCESS(clk_in)
BEGIN
IF(RISING_EDGE(clk_in)) THEN
IF(reset = '1') THEN
dram_busy_sig <= '0';
ELSE
IF((to_integer(unsigned(no_of_refs_needed)) /= 0) AND
(( wr_n_from_up_del_1 = '0' AND
rd_n_from_up = '1' AND wr_n_from_up = '1'))) THEN
dram_busy_sig <= '1';
ELSIF((to_integer(unsigned(no_of_refs_needed)) /= 0) AND
( wr_n_from_up = '0' OR rd_n_from_up = '0')) THEN
dram_busy_sig <= '0';
ELSIF(to_integer(unsigned(no_of_refs_needed)) = 0) THEN
dram_busy_sig <= '0';
ELSE
dram_busy_sig <= '1';
END IF;
END IF;
END IF;
END PROCESS dram_busy_gen;
--##############################################################################
-- Process:
--##############################################################################
cke_gen_reg: PROCESS(clk_in)
BEGIN
IF(RISING_EDGE(clk_in)) THEN
IF(reset = '1') THEN
cke <= '0';
ELSE
cke <= '1';
END IF;
END IF;
END PROCESS cke_gen_reg;
clk <= clk_in ;
cs_n <= command_bus(5);
ras_n <= command_bus(4);
cas_n <= command_bus(3);
we_n <= command_bus(2);
dqm <= command_bus(1 downto 0);
dram_init_done <= dram_init_done_s;
addr <= addr_sig;
dram_busy <= dram_busy_sig ;
ba <= ba_sig;
END rtl;
--##############################################################################
--OPTIONAL CONFIGURATION STATEMENT BELOW, can be UNCOMMENTED IF DESIRED
--##############################################################################
--CONFIGURATION dramcntrl_conf OF dramcntrl IS
-- FOR rtl
-- END FOR;
--END dramcntrl_conf;
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