Fitter Status : Successful - Tue Oct 28 12:39:43 2008
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Web Edition
Revision Name : tel
Top-level Entity Name : tel
Family : Stratix II
Device : EP2S15F484C3
Timing Models : Final
Logic utilization : < 1 %
    Combinational ALUTs : 112 / 12,480 ( < 1 % )
    Dedicated logic registers : 0 / 12,480 ( 0 % )
Total registers : 0
Total pins : 78 / 343 ( 23 % )
Total virtual pins : 0
Total block memory bits : 0 / 419,328 ( 0 % )
DSP block 9-bit elements : 0 / 96 ( 0 % )
Total PLLs : 0 / 6 ( 0 % )
Total DLLs : 0 / 2 ( 0 % )