?? cnt20.vhd
字號:
--30M to 40M Oscillator;
--Divide per 20;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT20 IS
PORT
(
CLK:IN STD_LOGIC;
SH,RS,PULSE:OUT STD_LOGIC; --Signals of CCD;PULSE:to PULSE1 and PULSE2 through a WIRE gat and a NOT gat;
PULSE2,ROG:BUFFER STD_LOGIC;
LED: OUT STD_LOGIC
);
END CNT20;
ARCHITECTURE A OF CNT20 IS
SIGNAL Q: INTEGER RANGE 0 TO 19;
SIGNAL NUM: INTEGER RANGE 0 TO 42599;
SIGNAL NUMLED: INTEGER RANGE 0 TO 511;
BEGIN
PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK='1' THEN
CASE Q IS
WHEN 8|9 =>
RS<='1';
SH<='0';
Q<=Q+1;
WHEN 11|12=>
SH<='1';
RS<='0';
Q<=Q+1;
WHEN 19 =>
RS<='1';
SH<='1';
PULSE2<=NOT PULSE2;
Q<=0;
WHEN OTHERS =>
RS<='1';
SH<='1';
Q<=Q+1;
END CASE;
END IF;
END PROCESS;
PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK='0' THEN
IF NUM=42599 THEN NUM<=0;
ELSE
IF (NUM>1)AND(NUM<14) THEN
ROG<='1';
ELSE
ROG<='0';
END IF;
NUM<=NUM+1;
END IF;
END IF;
END PROCESS;
PULSE<= NOT PULSE2;
PROCESS(ROG)
BEGIN
IF ROG'EVENT AND ROG='1' THEN
IF NUMLED<256 THEN LED<='1';
ELSE LED<='0';
END IF;
NUMLED<=NUMLED+1;
END IF;
END PROCESS;
END A;
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