// Generated by NCO 8.1 [Altera, IP Toolbench 1.3.0 Build 163]
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
// ************************************************************
// Copyright (C) 1991-2009 Altera Corporation
// Any megafunction design, and related net list (encrypted or decrypted),
// support information, device programming or simulation file, and any other
// associated documentation or information provided by Altera or a partner
// under Altera's Megafunction Partnership Program may be used only to
// program PLD devices (but not masked PLD devices) from Altera.  Any other
// use of such megafunction design, net list, support information, device
// programming or simulation file, or any other related documentation or
// information is prohibited for any other purpose, including, but not
// limited to modification, reverse engineering, de-compiling, or use with
// any other silicon devices, unless such use is explicitly licensed under
// a separate agreement with Altera or a megafunction partner.  Title to
// the intellectual property, including patents, copyrights, trademarks,
// trade secrets, or maskworks, embodied in any such megafunction design,
// net list, support information, device programming or simulation file, or
// any other related documentation or information provided by Altera or a
// megafunction partner, remains with Altera, the megafunction partner, or
// their respective licensors.  No other licenses, including any licenses
// needed under any third party's intellectual property, are provided herein.

module NCO (
	phi_inc_i,
	clk,
	reset_n,
	clken,
	phase_mod_i,
	freq_mod_i,
	fsin_o,
	out_valid);

	input	[31:0]	phi_inc_i;
	input		clk;
	input		reset_n;
	input		clken;
	input	[9:0]	phase_mod_i;
	input	[15:0]	freq_mod_i;
	output	[9:0]	fsin_o;
	output		out_valid;
endmodule