# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2009 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.0 Build 132 02/25/2009 SJ Web Edition
# Date created = 09:30:47  April 19, 2009
#
# -------------------------------------------------------------------------- #
#
# Note:
#
# 1) Do not modify this file. This file was generated
#    automatically by the Quartus II software and is used
#    to preserve global assignments across Quartus II versions.
#
# -------------------------------------------------------------------------- #

set_global_assignment -name PROJECT_SHOW_ENTITY_NAME On
set_global_assignment -name PROJECT_USE_SIMPLIFIED_NAMES Off
set_global_assignment -name ENABLE_REDUCED_MEMORY_MODE Off
set_global_assignment -name VER_COMPATIBLE_DB_DIR export_db
set_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off
set_global_assignment -name SMART_RECOMPILE Off
set_global_assignment -name FLOW_DISABLE_ASSEMBLER Off
set_global_assignment -name FLOW_ENABLE_HC_COMPARE Off
set_global_assignment -name HC_OUTPUT_DIR hc_output
set_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off
set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off
set_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On
set_global_assignment -name FLOW_ENABLE_RTL_VIEWER Off
set_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS "Use global settings"
set_global_assignment -name FLOW_HARDCOPY_DESIGN_READINESS_CHECK On
set_global_assignment -name DEFAULT_HOLD_MULTICYCLE "Same as Multicycle"
set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On
set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On
set_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On
set_global_assignment -name DO_COMBINED_ANALYSIS Off
set_global_assignment -name IGNORE_CLOCK_SETTINGS Off
set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS -value ON
set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS Off
set_global_assignment -name ENABLE_CLOCK_LATENCY Off
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family ACEX1K
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000B
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "HardCopy II"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10KA
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Stratix IV"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Cyclone III"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "HardCopy Stratix"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family APEX20KE
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000AE
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family Cyclone
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix II GX"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10K
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "MAX II"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family APEX20KC
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Arria II GX"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix GX"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000S
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX6000
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "APEX II"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10KE
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Cyclone II"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Stratix III"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Arria GX"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX3000A
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix II"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family Stratix
set_global_assignment -name NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT 10
set_global_assignment -name NUMBER_OF_DESTINATION_TO_REPORT 10
set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 200
set_global_assignment -name DO_MIN_ANALYSIS Off
set_global_assignment -name DO_MIN_TIMING Off
set_global_assignment -name REPORT_IO_PATHS_SEPARATELY Off
set_global_assignment -name FLOW_ENABLE_TIMING_CONSTRAINT_CHECK Off
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family ACEX1K
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000B
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "HardCopy II"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10KA
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix IV"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Cyclone III"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "HardCopy Stratix"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family APEX20KE
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000AE
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family Cyclone
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix II GX"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10K
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "MAX II"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family APEX20KC
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Arria II GX"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "Stratix GX"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000S
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX6000
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "APEX II"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10KE
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Cyclone II"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix III"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Arria GX"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX3000A
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix II"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family Stratix
set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING Off
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family ACEX1K
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family MAX7000B
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "HardCopy II"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family FLEX10KA
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family "Stratix IV"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family "Cyclone III"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "HardCopy Stratix"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family APEX20KE
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family MAX7000AE
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family Cyclone
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "Stratix II GX"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family FLEX10K
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "MAX II"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family APEX20KC
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family "Arria II GX"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "Stratix GX"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family MAX7000S
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family FLEX6000
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "APEX II"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family FLEX10KE
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "Cyclone II"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family "Stratix III"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "Arria GX"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family MAX3000A
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family "Stratix II"
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family Stratix
set_global_assignment -name MUX_RESTRUCTURE Auto
set_global_assignment -name ENABLE_IP_DEBUG Off
set_global_assignment -name SAVE_DISK_SPACE On
set_global_assignment -name DISABLE_OCP_HW_EVAL Off
set_global_assignment -name DEVICE_FILTER_PACKAGE Any
set_global_assignment -name DEVICE_FILTER_PIN_COUNT Any
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
set_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001
set_global_assignment -name VHDL_INPUT_VERSION VHDL93
set_global_assignment -name FAMILY -value Stratix
set_global_assignment -name TRUE_WYSIWYG_FLOW Off
set_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off
set_global_assignment -name STATE_MACHINE_PROCESSING Auto
set_global_assignment -name SAFE_STATE_MACHINE Off
set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On
set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On
set_global_assignment -name IGNORE_VERILOG_INITIAL_CONSTRUCTS Off
set_global_assignment -name VERILOG_CONSTANT_LOOP_LIMIT 5000
set_global_assignment -name VERILOG_NON_CONSTANT_LOOP_LIMIT 250
set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS On
set_global_assignment -name PARALLEL_SYNTHESIS Off
set_global_assignment -name DSP_BLOCK_BALANCING Auto
set_global_assignment -name MAX_BALANCING_DSP_BLOCKS "-1 (Unlimited)"
set_global_assignment -name NOT_GATE_PUSH_BACK On
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE On
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS On
set_global_assignment -name IGNORE_CARRY_BUFFERS Off
set_global_assignment -name IGNORE_CASCADE_BUFFERS Off
set_global_assignment -name IGNORE_GLOBAL_BUFFERS Off
set_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off
set_global_assignment -name IGNORE_LCELL_BUFFERS Off
set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO
set_global_assignment -name IGNORE_SOFT_BUFFERS On
set_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off
set_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off
set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On
set_global_assignment -name AUTO_GLOBAL_OE_MAX On
set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On
set_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off
set_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut
set_global_assignment -name OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed
set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced
set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area
set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area
set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area
set_global_assignment -name ALLOW_XOR_GATE_USAGE On
set_global_assignment -name AUTO_LCELL_INSERTION On
set_global_assignment -name CARRY_CHAIN_LENGTH 48
set_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32
set_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32
set_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48
set_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70
set_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70
set_global_assignment -name CASCADE_CHAIN_LENGTH 2
set_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16
set_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4
set_global_assignment -name AUTO_CARRY_CHAINS On
set_global_assignment -name AUTO_CASCADE_CHAINS On
set_global_assignment -name AUTO_PARALLEL_EXPANDERS On