////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____ 
//  /   /\/   / 
// /___/  \  /    Vendor: Xilinx 
// \   \   \/     Version : 7.1.04i
//  \   \         Application : ISE Foundation
//  /   /         Filename : test_pwm_sch.ant
// /___/   /\     Timestamp : Wed Feb 21 16:11:55 2007
// \   \  /  \ 
//  \___\/\___\ 
//
//Command: 
//Design Name: test_pwm_sch
//Device: Xilinx
//
`timescale 1ns/1ps

module test_pwm_sch;
    reg CLK = 1'b0;
    reg [3:0] DATA = 4'b0000;
    reg RST = 1'b1;
    wire PWM;

    parameter PERIOD = 200;
    parameter real DUTY_CYCLE = 0.5;
    parameter OFFSET = 0;

    initial    // Clock process for CLK
    begin
        #OFFSET;
        forever
        begin
            CLK = 1'b0;
            #(PERIOD-(PERIOD*DUTY_CYCLE)) CLK = 1'b1;
            #(PERIOD*DUTY_CYCLE);
        end
    end

    pwm_sch UUT (
        .CLK(CLK),
        .DATA(DATA),
        .RST(RST),
        .PWM(PWM));

    integer TX_FILE = 0;
    integer TX_ERROR = 0;
    
    initial begin    // Annotation process for clock CLK
        #0;
        ANNOTATE_PWM;
        #OFFSET;
        forever begin
            #115;
            ANNOTATE_PWM;
            #85;
        end
    end

    initial begin  // Open the annotations file...
        TX_FILE = $fopen("\\\\pimlico\\epie1\\pdrive_labs\\en518_2007\\PWM\\test_pwm_sch.ano");
        #100200 // Final time:  100200 ns
        $display("Success! Annotation Simulation Complete.");
        $fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
        $fclose(TX_FILE);
        $finish;
    end

    initial begin
        // -------------  Current Time:  285ns
        #285;
        RST = 1'b0;
        // -------------------------------------
    end

    task ANNOTATE_PWM;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,PWM,%b]", $time, PWM);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

endmodule