KEY LIBERO "8.3"
KEY CAPTURE "8.3.0.22"
KEY DEFAULT_IMPORT_LOC ""
KEY DEFAULT_OPEN_LOC ""
KEY HDLTechnology "VHDL"
KEY VendorTechnology_Family "ProASIC3"
KEY VendorTechnology_Die "IS4X4M1"
KEY VendorTechnology_Package "pq208"
KEY ProjectLocation "C:\Documents and Settings\BySky\My Documents\4bitcomp"
KEY SimulationType "VHDL"
KEY Vendor "Actel"
KEY ActiveRoot "a_4_bit_comparator::work"
LIST REVISIONS
VALUE="Impl1",NUM=1
CURREV=1
ENDLIST
LIST FileManager
VALUE "<project>\hdl\4bitcomp.vhd,hdl"
STATE="utd"
TIME="1226934030"
SIZE="1770"
ENDFILE
VALUE "<project>\simulation\run.do,do"
STATE="utd"
TIME="1226934263"
SIZE="597"
ENDFILE
VALUE "<project>\stimulus\ModelUnderTest_tbench.btim,btim"
STATE="utd"
TIME="1226934240"
SIZE="7461"
ENDFILE
VALUE "<project>\stimulus\ModelUnderTest_tbench.vhd,tb_hdl"
STATE="utd"
TIME="1226934249"
SIZE="10026"
ENDFILE
ENDLIST
LIST UsedFile
ENDLIST
LIST NewModulesInfo
LIST "a_4_bit_comparator::work"
FILE "<project>\hdl\4bitcomp.vhd,hdl"
LIST AssociatedStimulus
VALUE "<project>\stimulus\ModelUnderTest_tbench.vhd,tb_hdl"
ENDLIST
LIST ProjectState5.1
LIST Impl1
ideSTIMULUS=StateSuccess
ideSTIMULUSEDITOR=StateSuccess
LIST FlowOptions
UsePhySynth=FALSE
UseSynth=TRUE
ENDLIST
Used_File_List
ENDUsed_File_List
ENDLIST
ENDLIST
ENDLIST
ENDLIST
LIST AssociatedStimulus
LIST a_4_bit_comparator
VALUE "<project>\stimulus\ModelUnderTest_tbench.vhd,tb_hdl"
ENDLIST
ENDLIST
LIST Other_Association
ENDLIST
LIST SimulationOptions
UseAutomaticDoFile=true
IncludeWaveDo=false
Type=max
RunTime=1000ns
Resolution=1ps
VsimOpt=
EntityName=testbench
TopInstanceName=<top>_0
DoFileName=
DoFileName2=wave.do
DoFileParams=
DisplayDUTWave=false
LogAllSignals=false
DumpVCD=false
VCDFileName=power.vcd
ENDLIST
LIST ModelSimLibPath
UseCustomPath=FALSE
LibraryPath=
ENDLIST
LIST GlobalFlowOptions
GenerateHDLAfterSynthesis=FALSE
GenerateHDLAfterPhySynthesis=FALSE
RunDRCAfterSynthesis=FALSE
UpdateViewDrawIni=TRUE
UpdateModelSimIni=TRUE
NoIOMode=FALSE
GenerateHDLFromSchematic=TRUE
FlashProInputFile=pdb
SmartGenCompileReport=T
ENDLIST
LIST PhySynthesisOptions
ENDLIST
LIST Profiles
Type=CoreConfigurator
Profile=CoreConsole
Tool=CoreConsole v1.3 or later
Location=coreconsole
AdditionalParameter=
Batch=false
EndProfile
Type=Synthesis
Profile=Synplify
Tool=Synplify
Location=C:\Libero\Synplify\Synplify_902A2\bin\Synplify.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Simulation
Profile=ModelSim
Tool=ModelSim
Location=C:\Libero\Model\win32acoem\modelsim.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Stimulus
Profile=WFL
Tool=WFL
Location=C:\Libero\WFL\bin\syncad.exe
AdditionalParameter=-pwflite
Batch=false
EndProfile
Type=PhySynthesis
Profile=
Tool=
Location=
AdditionalParameter=
Batch=false
EndProfile
Type=Program
Profile=FlashPro
Tool=FlashPro
Location=C:\Libero\FlashPro\bin\FlashPro.exe
AdditionalParameter=
Batch=false
EndProfile
ENDLIST
LIST ProjectState5.1
LIST "a_4_bit_comparator::work"
LIST Impl1
ideSTIMULUS=StateSuccess
ideSTIMULUSEDITOR=StateSuccess
LIST FlowOptions
UsePhySynth=FALSE
UseSynth=TRUE
ENDLIST
Used_File_List
ENDUsed_File_List
ENDLIST
ENDLIST
ENDLIST
LIST ExcludePackageForSimulation
ENDLIST
LIST ExcludePackageForSynthesis
ENDLIST
LIST IncludeModuleForSimulation
ENDLIST
LIST CDBOrder
ENDLIST
LIST UserCustomizedFileList
ENDLIST
LIST OpenedFileList
ENDLIST