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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity clock is
Port ( seg : out std_logic_vector(7 downto 0);
a : out std_logic_vector(3 downto 0);--用于選通三極管
clk : in std_logic);
end clock;
architecture Behavioral of clock is
signal divcounter: std_logic_vector(27 downto 0);
signal divclk:std_logic;
signal sec_counter1:std_logic_vector(3 downto 0);
signal sec_counter2:std_logic_vector(3 downto 0);
signal min_counter1:std_logic_vector(3 downto 0);
signal min_counter2:std_logic_vector(3 downto 0);
signal scan : std_logic_vector(8 downto 0);
signal scan_clk: std_logic_vector(1 downto 0);
signal SecSeg1,MinSeg1,SecSeg2,MinSeg2 : std_logic_vector(7 downto 0);
begin
--將原始時鐘信號分頻得到1s為周期的時鐘信號divclk
DIV_CLOCK:process(clk)
begin
if clk='1' and clk'event then
if(divcounter>=X"17D783F")then
divcounter<=X"0000000";
divclk<=not divclk;
else
divcounter<=divcounter+'1';
end if;
end if;
end process;
--完成秒和分的計數
CLOCK:process(divclk)
begin
if divclk'event and divclk='1' then
if(sec_counter1>=X"9") then
sec_counter1<=X"0";
if(sec_counter2>=X"5")then
sec_counter2<=X"0";
if(min_counter1>=X"9")then
min_counter1<=X"0";
if(min_counter2>=X"5")then
min_counter2<=X"0";
else
min_counter2<=min_counter2+'1';
end if;
else
min_counter1<=min_counter1+'1';
end if;
else
sec_counter2<=sec_counter2+'1';
end if;
else
sec_counter1<=sec_counter1+'1';
end if;
end if;
end process;
--產生掃描信號
SCAN_COUNTER:process(clk)
begin
if (clk'event and clk='1') then
scan<=scan+1;
end if;
end process;
scan_clk<=scan(8 downto 7);
--在掃描信號的作用下,輪流選通各個數碼管
OUT_PUT:process(scan_clk)
begin
case scan_clk is
when "00"=>
seg<=SecSeg1;
a<="0001";
when "01"=>
seg<=SecSeg2;
a<="0010";
when "10"=>
seg<=MinSeg1;
a<="0100";
when "11"=>
seg<=MinSeg2;
a<="1000";
when others=>seg<="11111111";a<="0000";
end case;
end process;
--秒個位驅動數碼管
SECOND_COUNTER1:process(sec_counter1)
begin
case sec_counter1 is
when "0000" =>SecSeg1<="00000011";--0
when "0001" =>SecSeg1<="10011111";--1
when "0010" =>SecSeg1<="00100101";--2
when "0011" =>SecSeg1<="00001101";--3
when "0100" =>SecSeg1<="10011001";--4
when "0101" =>SecSeg1<="01001001";--5
when "0110" =>SecSeg1<="01000001";--6
when "0111" =>SecSeg1<="00011111";--7
when "1000" =>SecSeg1<="00000001";--8
when "1001" =>SecSeg1<="00001001";--9
when others =>SecSeg1<="11111111";
end case;
end process;
--秒十位驅動數碼管
SECOND_COUNTER2:process(sec_counter2)
begin
case sec_counter2 is
when "0000" =>SecSeg2<="00000011";--0
when "0001" =>SecSeg2<="10011111";--1
when "0010" =>SecSeg2<="00100101";--2
when "0011" =>SecSeg2<="00001101";--3
when "0100" =>SecSeg2<="10011001";--4
when "0101" =>SecSeg2<="01001001";--5
when others =>SecSeg2<="11111111";
end case;
end process;
--隔秒顯示一次分秒之間的點
DOT_DISPLAY:process(divclk)
begin
if divclk'event and divclk='1' then
MinSeg1(0)<=not MinSeg1(0);
end if;
end process;
--分鐘個位驅動數碼管
MINUTE_COUNTER1:process(min_counter1)
begin
case min_counter1 is
when "0000" =>MinSeg1(7 downto 1)<="0000001";--0
when "0001" =>MinSeg1(7 downto 1)<="1001111";--1
when "0010" =>MinSeg1(7 downto 1)<="0010010";--2
when "0011" =>MinSeg1(7 downto 1)<="0000110";--3
when "0100" =>MinSeg1(7 downto 1)<="1001100";--4
when "0101" =>MinSeg1(7 downto 1)<="0100100";--5
when "0110" =>MinSeg1(7 downto 1)<="0100000";--6
when "0111" =>MinSeg1(7 downto 1)<="0001111";--7
when "1000" =>MinSeg1(7 downto 1)<="0000000";--8
when "1001" =>MinSeg1(7 downto 1)<="0000100";--9
when others =>MinSeg1(7 downto 1)<="1111111";
end case;
end process;
--分鐘十位驅動數碼管
MINUTE_COUNTER2:process(min_counter2)
begin
case min_counter2 is
when "0000" =>MinSeg2<="00000011";--0
when "0001" =>MinSeg2<="10011111";--1
when "0010" =>MinSeg2<="00100101";--2
when "0011" =>MinSeg2<="00001101";--3
when "0100" =>MinSeg2<="10011001";--4
when "0101" =>MinSeg2<="01001001";--5
when others =>MinSeg2<="11111111";
end case;
end process;
end Behavioral;
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