***	SigParser and the Netlister now ignore function and task IOs.****	Preproc line numbers being off due to multi-line defines.  [Mat Zeno]****	Fix `include `DEFINE.* Verilog::Language 2.341 2006/02/06***	Add SystemVerilog `0, `1, `x, `z.  [John Tseng]****	Fix module #() parameter declarations.  [Andy Kuo]****	Fix "output reg" and "output wire" declarations.  [Andy Kuo]* Verilog::Language 2.340 2006/01/16***     Added vpm --minimum switch.****	Added Verilog::Language::language_standard to allow setting	which language standard (1995,2001,SystemVerilog) is used for keywords.****	Fix vhier -o option. [Sean Nazareth]****	Add vhier --modules and --missing-modules options. [Sean Nazareth]* Verilog::Language 2.331 2005/10/05***     Added vhier example program. [Vasu Arasanipalai]* Verilog::Language 2.330 2005/09/06***	vpm now aliases $error to $uerror, etc, to avoid conflict	with SystemVerilog $error function.  [Tad Truex]***	$uassert_info now uses __message_on. [Vasu Arasanipalai]****	Fix preprocessor substitution of quoted parametrized defines.* Verilog::Language 2.321 2005/08/03***	Verilog::SigParser now sees cells inside generates.  [by Thomas Ziller]* Verilog::Language 2.320 2005/07/27***     Add vrename --cryptall option.***     Fix Language is_keywords to match V2K language spec. [Mark Grossman]	Deleted extern, makefile, supply.  Added ifnone, strength, unsigned.****	Fix core dump when missing newline in `define.  [David van der bokke]* Verilog::Language 2.316 2005/06/10****	Fix define substitution with incomplete defines.  [by Ronald Dean Smith]****	Fix C++ Comments causing Perl compile problems. [Merijn Brand]* Verilog::Language 2.315 2005/03/16****	Support for latest SystemC::Netlist version.* Verilog::Language 2.314 2005/03/14****	Support for latest SystemC::Netlist version.* Verilog::Language 2.313 2005/03/01***	Vrename no longer recurses into CVS or .svn directories.***	Add specparam keyword. [Mark Grossman]****	Add NC-Verilog, and Verilog::Parser tests.* Verilog::Language 2.312 2005/02/04***	Fix ignoring lines with same line number as end of last include.* Verilog::Language 2.311 2005/01/27***	Support parsing of signed numbers.  [Rudi Rughoonundon]**** 	Fix resolve_filename misfinding directories. [John Tseng]****    Fix Verilog::Getopt::get_parameters for NC-Verilog.* Verilog::Language 2.310 2005/01/24**	NEWS is now renamed Changes, to support CPAN indexing. [Offer Kaye]**	Support Verilog 2001 ansi-style port declarations. [Rudi Rughoonundon]**	Pins, nets, ports, and cells accessor methods now return lists	rather than internal hash references.  This matches earlier	documentation, and behavior of the pins_sorted, etc functions.***	SigParser::module callback no longer gets list of ports, instead	SigParser::port is called back on each port.***	Add Verilog::GetOpt GCC -U<define> switch for undefining.****	Support SUSE Linux and OS-X. [Jose Renau]* Verilog::Language 2.303 2004/11/18***	Add vpm --nopli for stripping $pli calls. [Mike Lopresti]* Verilog::Language 2.302 2004/11/10****	Support Verilog 2001 named instantiation parameters. [Thomas Ziller]* Verilog::Language 2.301 2004/10/26****	Fix pod documentation errors. [Offer Kaye]* Verilog::Language 2.300 2004/04/01**	Added vppp preprocessor command.**	Preprocessor is now Verilog 2001 and SystemVerilog 3.1 compliant.	Adds arguments to defines, and `include <> syntax.**	Added SystemVerilog 3.1 keywords to Verilog::Language**	Added vrename --keywords and recursion on directory arguments.***	Added to SigParser::module callback "$in_celldefine" 4th argument.	Netlist::File sets $module->is_libcell() either if the file is a	library or the module is within "`celldefine ... `endcelldefine".***	Added to Verilog::Netlist (metacomment=>{ firstWord=>val, ... })	argument.  For each comment that begins with at least two words,	Verilog::SigParser calls back attribute() if the first word has a	true value in %metacomment.***	Module::attrs_sorted() now returns a list of "category name[ =]..."	strings from metacomments between "module" and the first declaration.****	(Verilog::Preproc receives the list of metacomment keywords but	does not yet filter the comments for speed.)****	Fixed ` substitution inside define value strings.* Verilog::Language 2.232 2004/3/10***	Fix newline insertion in vpm $info messages.* Verilog::Language 2.231 2004/1/27****	Documentation fixes.* Verilog::Language 2.230 2003/10/02**	Vpm has been changed to use Verilog standard flags.	Vpm will no longer recurse all directories, instead it now accepts	+incdir+, -v or -f flags as would a regular simulator, and	preprocesses all files found.**	Added Netlist::verilog_text for writing netlists. [Phillip Prentice]***	Added Cell/Port/Pin::delete methods for editing netlists.***	Added Netlist::top_modules_sorted method.***	In Netlist, read in library files if cell not found. [John Potter]***	Fix SigParser dropping 1'b0/1'b1 pins. [John Potter]***	In vpm, support $error({"concatenate ","string"}); [Ray Strouble]****	In vpm, fix comments and line numbering in asserts. [Ray Strouble]****	Fix detection of wire assignments. [David Duxstad]* Verilog::Language 2.226 2003/8/19****	GCC 3.3 fixes* Verilog::Language 2.225 2003/8/12***	Have Getopt::parameter return unknown arguments from	inside -f files.  [David Duxstad]***	Change assert_amone/onehot to use faster equation	in place of case statement. [Greg Waters]****	Add tri/tri0/tri1 as wire declarative terms. [David Duxstad]****	Redhat 9 and GCC 3.2.2 fixes* Verilog::Language 2.224 2003/5/20**	Add order based pin/cell connections.  [by David Duxstad]* Verilog::Language 2.222 2003/3/6****	Support instantiations with multiple cell names. [Bruce Nepple]****	Support uppercase radix letters.  [Wilson Li]* Verilog::Language 2.221 2003/3/4****	Fix missing example.cpp file* Verilog::Language 2.220 2003/2/6***	Support primitives as if they were modules.  [Bruce Nepple]***	The link_read_nonfatal=>1 netlist option will prevent missing	modules from being errors during link.  [Bruce Nepple]***	Add Verilog::Parser support for `protected. [Scott Bleiweiss]****	Update documentation & Netlist example.  [Bruce Nepple]* Verilog::Language 2.220 2002/12/27****	Solaris perl 5.005_03 LD error fixed.  [Mark Moe]	Solaris note about FILE_OFFSET_BITS.  [Simon Curry]****	GCC 3.2 use std compile errors fixed. [Eugene Weber]* Verilog::Language 2.214 2002/10/21***	Pickup input msb & lsb's.  [Joel Earl]****	Fix inclusion of x's in $assert_onehot for verilator. [Ray Strouble]* Verilog::Language 2.213 2002/9/5****	Support Cygwin (Windows) installations.  [Richard Dje]* Verilog::Language 2.212 2002/8/30***	Fix pin concatenations to not create false pins. [Kenneth Jiang]	Concatenations are now just ignored; there is still no way to track	pin interconnects where different bus bits end up interconnected	differently.* Verilog::Language 2.211 2002/8/19***	If Verilog::Getopt list accessors are passed a reference,	set the entire list to the reference, rather than adding a element.* Verilog::Language 2.210 2002/8/8****	Cleanups to support GNU Bison 1.35****	Minor changes for SystemC support* Verilog::Language 2.200 2002/5/3***	Many fixes to vrename --crypt, including fixing `timescale,	comments, and replacement of strings.  [Greg Davis]****	Fixed vpm $asserts dropping extra newlines. [Greg Waters]****	Fixed `define substitution bug.* Verilog::Language 2.100 2002/3/11**	Installation now requires GCC/G++ and Flex.**	Added Verilog::Preproc, a Verilog 2001 Preprocessor.	Verilog::Netlist now uses this preprocessor by default.****	Fixed bug with vrename --crypt not working.  [Greg Davis]****	Fixed bug with vrename and \ quoted signals.  [Greg Davis]* Verilog::Language 2.010 2001/11/16***	Added netlist interconnectivity checks.* Verilog::Language 2.000 2001/9/17**	Added the Verilog::Netlist package.	This allows for simple scripts to extract pins, module	hierarchy, etc from interconnected Verilog files.***	Added Parser reset() method for clearing parse states	for new files.  [Joe Panec]* Verilog::Language 1.15 2001/10/25**	Added $assert_req_ack for checking simple handshakes.**	Added --nostop, and made --stop be the default.	This adds a $stop to $warn and $error, which is easier	for new users to understand as no pli.v is required.* Verilog::Language 1.14 2001/9/17***	Fixed bug when endmodule/endtask/endfunction have	no trailing ;.  [Darren Jones]***	Added Verilog 2001 keywords to Verilog::Language.* Verilog::Language 1.13 2001/5/17***	Added Verilog::Getopt::get_parameter() function.***	Added Verilog::Getopt::file_abs() function.***	Added missing keywords to Verilog::Language:	deassign disable extern highz0 highz1 large medium pull0	pull1 release scalared small strong0 strong1 weak0 weak1* Verilog::Language 1.12 2001/5/15**	Added new Verilog::Getopt, for standard option parsing.* Verilog::Language 1.11 2001/3/31***	Fixed \net### hang in Parser.  [Mark Lakata]* Verilog::Language 1.10 2001/3/15***	Fixed line number being incorrect in Parser.  [Alan Heinold]* Verilog::Language 1.9 2001/2/13**	Added Verilog::Language::is_compdirect.  [Darren Jones]* Verilog::Language 1.7 2000/11/02**	Added parametric module support to Parser.pm.  [Darren Jones]****	Fixed bug where // comments with no following text broke.	[Darren Jones]* Verilog::Language 1.6 2000/9/07**	Added the vpm preprocessor****	Fixed bug where missing end-quote would hang Verilog::Parser* Verilog::Language 1.5 2000/5/22**	Allowed non-numerics in bus subscripts	[Alan.Heinold@East.Sun.COM]***	Fixed bug where lines with just a newline would boggle the linecount.* Verilog::Language 1.4 2000/1/21****	test.pl added----------------------------------------------------------------------DESCRIPTION: Documentation on change history for this package----------------------------------------------------------------------This uses outline mode in Emacs.  See C-h m [M-x describe-mode].Copyright 2001-2009 by Wilson Snyder.  This program is free software;you can redistribute it and/or modify it under the terms of either the GNULesser General Public License or the Perl Artistic License.Local variables:mode: outlineparagraph-separate: "[ 	\f\n]*$"end: