|lcd
clk => clkcnt[0].CLK
clk => clkcnt[1].CLK
clk => clkcnt[2].CLK
clk => clkcnt[3].CLK
clk => clkcnt[4].CLK
clk => clkcnt[5].CLK
clk => clkcnt[6].CLK
clk => clkcnt[7].CLK
clk => clkcnt[8].CLK
clk => clkcnt[9].CLK
clk => clkcnt[10].CLK
clk => clkcnt[11].CLK
clk => clkcnt[12].CLK
clk => clkcnt[13].CLK
clk => clkcnt[14].CLK
clk => clkcnt[15].CLK
clk => clkcnt[16].CLK
clk => clkcnt[17].CLK
clk => clkcnt[18].CLK
Reset => clkcnt[18].ACLR
Reset => clkcnt[17].ACLR
Reset => clkcnt[16].ACLR
Reset => clkcnt[15].ACLR
Reset => clkcnt[14].ACLR
Reset => clkcnt[13].ACLR
Reset => clkcnt[12].ACLR
Reset => clkcnt[11].ACLR
Reset => clkcnt[10].ACLR
Reset => clkcnt[9].ACLR
Reset => clkcnt[8].ACLR
Reset => clkcnt[7].ACLR
Reset => clkcnt[6].ACLR
Reset => clkcnt[5].ACLR
Reset => clkcnt[4].ACLR
Reset => clkcnt[3].ACLR
Reset => clkcnt[2].ACLR
Reset => clkcnt[1].ACLR
Reset => clkcnt[0].ACLR
Reset => clkdiv.ACLR
Reset => lcd_e~reg0.ACLR
Reset => clk_int.ACLR
Reset => div_counter[0].ACLR
Reset => div_counter[1].ACLR
Reset => div_counter[2].ACLR
Reset => div_counter[3].ACLR
Reset => flag.ACLR
Reset => counter[0].ACLR
Reset => counter[1].ACLR
Reset => counter[2].ACLR
Reset => counter[3].ACLR
Reset => counter[4].ACLR
Reset => counter[5].ACLR
Reset => counter[6].ACLR
Reset => state[0].ACLR
Reset => state[1].ACLR
Reset => state[2].ACLR
Reset => state[3].ACLR
Reset => state[4].ACLR
Reset => state[5].ACLR
Reset => state[6].ACLR
Reset => state[7].ACLR
Reset => state[8].ACLR
Reset => state[9].ACLR
Reset => state[10].ACLR
lcd_rs <= lcd_rs~0.DB_MAX_OUTPUT_PORT_TYPE
lcd_rw <= lcd_rw~7.DB_MAX_OUTPUT_PORT_TYPE
lcd_e <= lcd_e~reg0.DB_MAX_OUTPUT_PORT_TYPE
data[0] <= comb~9.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= comb~19.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= comb~29.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= comb~39.DB_MAX_OUTPUT_PORT_TYPE
data[4] <= comb~49.DB_MAX_OUTPUT_PORT_TYPE
data[5] <= comb~59.DB_MAX_OUTPUT_PORT_TYPE
data[6] <= comb~69.DB_MAX_OUTPUT_PORT_TYPE
data[7] <= comb~88.DB_MAX_OUTPUT_PORT_TYPE
clk_out <= clk_int.DB_MAX_OUTPUT_PORT_TYPE


|lcd|char_ram:aa
address[0] => Mux0.IN69
address[0] => Mux1.IN69
address[0] => Mux2.IN69
address[0] => Mux3.IN69
address[0] => Mux4.IN69
address[0] => Mux5.IN69
address[0] => Mux6.IN69
address[1] => Mux0.IN68
address[1] => Mux1.IN68
address[1] => Mux2.IN68
address[1] => Mux3.IN68
address[1] => Mux4.IN68
address[1] => Mux5.IN68
address[1] => Mux6.IN68
address[2] => Mux0.IN67
address[2] => Mux1.IN67
address[2] => Mux2.IN67
address[2] => Mux3.IN67
address[2] => Mux4.IN67
address[2] => Mux5.IN67
address[2] => Mux6.IN67
address[3] => Mux0.IN66
address[3] => Mux1.IN66
address[3] => Mux2.IN66
address[3] => Mux3.IN66
address[3] => Mux4.IN66
address[3] => Mux5.IN66
address[3] => Mux6.IN66
address[4] => Mux0.IN65
address[4] => Mux1.IN65
address[4] => Mux2.IN65
address[4] => Mux3.IN65
address[4] => Mux4.IN65
address[4] => Mux5.IN65
address[4] => Mux6.IN65
address[5] => Mux0.IN64
address[5] => Mux1.IN64
address[5] => Mux2.IN64
address[5] => Mux3.IN64
address[5] => Mux4.IN64
address[5] => Mux5.IN64
address[5] => Mux6.IN64
data[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
data[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
data[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
data[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
data[7] <= <GND>