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--H1_F_pc[7] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[7]
H1_F_pc[7] = AMPP_FUNCTION(CLOCK_50, H1L550, H1L791, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L72 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[9]~210
W1L72 = W1L137 & H1_W_alu_result[9] # !W1L137 & (H1_F_pc[7]);


--H1_W_alu_result[8] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[8]
H1_W_alu_result[8] = AMPP_FUNCTION(CLOCK_50, H1L693, H1_E_shift_rot_result[8], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[6] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[6]
H1_F_pc[6] = AMPP_FUNCTION(CLOCK_50, H1L547, H1L789, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L71 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[8]~211
W1L71 = W1L137 & H1_W_alu_result[8] # !W1L137 & (H1_F_pc[6]);


--H1_W_alu_result[7] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[7]
H1_W_alu_result[7] = AMPP_FUNCTION(CLOCK_50, H1L690, H1_E_shift_rot_result[7], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[5] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[5]
H1_F_pc[5] = AMPP_FUNCTION(CLOCK_50, H1L544, H1L787, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L70 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[7]~212
W1L70 = W1L137 & H1_W_alu_result[7] # !W1L137 & (H1_F_pc[5]);


--H1_W_alu_result[6] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[6]
H1_W_alu_result[6] = AMPP_FUNCTION(CLOCK_50, H1L687, H1_E_shift_rot_result[6], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[4] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[4]
H1_F_pc[4] = AMPP_FUNCTION(CLOCK_50, H1L541, H1L785, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L69 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[6]~213
W1L69 = W1L137 & H1_W_alu_result[6] # !W1L137 & (H1_F_pc[4]);


--H1_W_alu_result[5] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[5]
H1_W_alu_result[5] = AMPP_FUNCTION(CLOCK_50, H1L684, H1_E_shift_rot_result[5], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[3] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[3]
H1_F_pc[3] = AMPP_FUNCTION(CLOCK_50, H1L590, E1_data_out, H1_W_valid);


--W1L68 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[5]~214
W1L68 = W1L137 & H1_W_alu_result[5] # !W1L137 & (H1_F_pc[3]);


--H1_W_alu_result[4] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[4]
H1_W_alu_result[4] = AMPP_FUNCTION(CLOCK_50, H1L681, H1_E_shift_rot_result[4], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[2] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[2]
H1_F_pc[2] = AMPP_FUNCTION(CLOCK_50, H1L537, H1L781, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L67 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[4]~215
W1L67 = W1L137 & H1_W_alu_result[4] # !W1L137 & (H1_F_pc[2]);


--H1_W_alu_result[3] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[3]
H1_W_alu_result[3] = AMPP_FUNCTION(CLOCK_50, H1L678, H1_E_shift_rot_result[3], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[1] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[1]
H1_F_pc[1] = AMPP_FUNCTION(CLOCK_50, H1L534, H1L779, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L66 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[3]~216
W1L66 = W1L137 & H1_W_alu_result[3] # !W1L137 & (H1_F_pc[1]);


--H1_W_alu_result[2] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[2]
H1_W_alu_result[2] = AMPP_FUNCTION(CLOCK_50, H1L675, H1_E_shift_rot_result[2], E1_data_out, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[0] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[0]
H1_F_pc[0] = AMPP_FUNCTION(CLOCK_50, H1L531, H1L777, E1_data_out, H1L591, H1L594, H1_W_valid);


--W1L65 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[2]~217
W1L65 = W1L137 & H1_W_alu_result[2] # !W1L137 & (H1_F_pc[0]);


--K1_cpu_0_instruction_master_dbs_address[1] is DE2_Board:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[1]
K1_cpu_0_instruction_master_dbs_address[1] = DFFEAS(K1L10, CLOCK_50, E1_data_out,  ,  ,  ,  ,  ,  );


--W1L64 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[1]~218
W1L64 = W1L137 & J1_cpu_0_data_master_dbs_address[1] # !W1L137 & (K1_cpu_0_instruction_master_dbs_address[1]);


--K1_cpu_0_instruction_master_dbs_address[0] is DE2_Board:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[0]
K1_cpu_0_instruction_master_dbs_address[0] = DFFEAS(K1L8, CLOCK_50, E1_data_out,  ,  ,  ,  ,  ,  );


--W1L63 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[0]~219
W1L63 = W1L137 & J1_cpu_0_data_master_dbs_address[0] # !W1L137 & (K1_cpu_0_instruction_master_dbs_address[0]);


--D1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
D1_hub_tdo = AMPP_FUNCTION(!A1L5, D1L13, !DC1_state[8]);


--W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0]
W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] = DFFEAS(W1L27, CLOCK_50, E1_data_out,  , W1L130,  ,  ,  ,  );


--W1L136 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_firsttransfer~100
W1L136 = W1_tri_state_bridge_0_avalon_slave_slavearbiterlockenable & (W1L135 # W1_last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1 & W1_cpu_0_data_master_requests_cfi_flash_0_s1);


--W1L129 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_winner[0]~39
W1L129 = W1L136 & W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] # !W1L136 & (W1L27 # W1_tri_state_bridge_0_avalon_slave_saved_chosen_master_vector[0] & !W1L137);


--W1_cfi_flash_0_s1_wait_counter[0] is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[0]
W1_cfi_flash_0_s1_wait_counter[0] = DFFEAS(W1L3, CLOCK_50, E1_data_out,  ,  ,  ,  ,  ,  );


--A1L62 is rtl~6
A1L62 = W1_cfi_flash_0_s1_wait_counter[3] # W1_cfi_flash_0_s1_wait_counter[2] # W1_cfi_flash_0_s1_wait_counter[1] # W1_cfi_flash_0_s1_wait_counter[0];


--W1L16 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_waits_for_read~15
W1L16 = A1L62 # !W1_d1_reasons_to_wait & (W1L29 # W1L21);


--W1L133 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_end_xfer~27
W1L133 = W1L27 # W1L137 & (H1_d_read # AB1_d_write);


--W1L117 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]~186
W1L117 = W1L16 & (W1L133 & W1L137 # !W1L133 & (W1L129)) # !W1L16 & (W1L129);


--W1L118 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]~187
W1L118 = W1L62 & W1L117 # !W1L62 & (W1_tri_state_bridge_0_avalon_slave_arb_addend[1]);


--H1_R_ctrl_exception is DE2_Board:inst|cpu_0:the_cpu_0|R_ctrl_exception
H1_R_ctrl_exception = AMPP_FUNCTION(CLOCK_50, H1_D_ctrl_exception, E1_data_out);


--H1_R_ctrl_break is DE2_Board:inst|cpu_0:the_cpu_0|R_ctrl_break
H1_R_ctrl_break = AMPP_FUNCTION(CLOCK_50, H1L16, E1_data_out);


--H1L591 is DE2_Board:inst|cpu_0:the_cpu_0|F_pc_nxt[20]~769
H1L591 = AMPP_FUNCTION(H1_R_ctrl_exception, H1_R_ctrl_break);


--H1L777 is DE2_Board:inst|cpu_0:the_cpu_0|add~1425
H1L777 = AMPP_FUNCTION(H1_F_pc[0], GND);

--H1L778 is DE2_Board:inst|cpu_0:the_cpu_0|add~1426
H1L778 = AMPP_FUNCTION(H1_F_pc[0]);


--H1L779 is DE2_Board:inst|cpu_0:the_cpu_0|add~1427
H1L779 = AMPP_FUNCTION(H1_F_pc[1], GND, H1L778);

--H1L780 is DE2_Board:inst|cpu_0:the_cpu_0|add~1428
H1L780 = AMPP_FUNCTION(H1_F_pc[1], H1L778);


--H1L781 is DE2_Board:inst|cpu_0:the_cpu_0|add~1429
H1L781 = AMPP_FUNCTION(H1_F_pc[2], GND, H1L780);

--H1L782 is DE2_Board:inst|cpu_0:the_cpu_0|add~1430
H1L782 = AMPP_FUNCTION(H1_F_pc[2], H1L780);


--H1L783 is DE2_Board:inst|cpu_0:the_cpu_0|add~1431
H1L783 = AMPP_FUNCTION(H1_F_pc[3], GND, H1L782);

--H1L784 is DE2_Board:inst|cpu_0:the_cpu_0|add~1432
H1L784 = AMPP_FUNCTION(H1_F_pc[3], H1L782);


--H1L785 is DE2_Board:inst|cpu_0:the_cpu_0|add~1433
H1L785 = AMPP_FUNCTION(H1_F_pc[4], GND, H1L784);

--H1L786 is DE2_Board:inst|cpu_0:the_cpu_0|add~1434
H1L786 = AMPP_FUNCTION(H1_F_pc[4], H1L784);


--H1L787 is DE2_Board:inst|cpu_0:the_cpu_0|add~1435
H1L787 = AMPP_FUNCTION(H1_F_pc[5], GND, H1L786);

--H1L788 is DE2_Board:inst|cpu_0:the_cpu_0|add~1436
H1L788 = AMPP_FUNCTION(H1_F_pc[5], H1L786);


--H1L789 is DE2_Board:inst|cpu_0:the_cpu_0|add~1437
H1L789 = AMPP_FUNCTION(H1_F_pc[6], GND, H1L788);

--H1L790 is DE2_Board:inst|cpu_0:the_cpu_0|add~1438
H1L790 = AMPP_FUNCTION(H1_F_pc[6], H1L788);


--H1L791 is DE2_Board:inst|cpu_0:the_cpu_0|add~1439
H1L791 = AMPP_FUNCTION(H1_F_pc[7], GND, H1L790);

--H1L792 is DE2_Board:inst|cpu_0:the_cpu_0|add~1440
H1L792 = AMPP_FUNCTION(H1_F_pc[7], H1L790);


--H1L793 is DE2_Board:inst|cpu_0:the_cpu_0|add~1441
H1L793 = AMPP_FUNCTION(H1_F_pc[8], GND, H1L792);

--H1L794 is DE2_Board:inst|cpu_0:the_cpu_0|add~1442
H1L794 = AMPP_FUNCTION(H1_F_pc[8], H1L792);


--H1L795 is DE2_Board:inst|cpu_0:the_cpu_0|add~1443
H1L795 = AMPP_FUNCTION(H1_F_pc[9], GND, H1L794);

--H1L796 is DE2_Board:inst|cpu_0:the_cpu_0|add~1444
H1L796 = AMPP_FUNCTION(H1_F_pc[9], H1L794);


--H1L797 is DE2_Board:inst|cpu_0:the_cpu_0|add~1445
H1L797 = AMPP_FUNCTION(H1_F_pc[10], GND, H1L796);

--H1L798 is DE2_Board:inst|cpu_0:the_cpu_0|add~1446
H1L798 = AMPP_FUNCTION(H1_F_pc[10], H1L796);


--H1L799 is DE2_Board:inst|cpu_0:the_cpu_0|add~1447
H1L799 = AMPP_FUNCTION(H1_F_pc[11], GND, H1L798);

--H1L800 is DE2_Board:inst|cpu_0:the_cpu_0|add~1448
H1L800 = AMPP_FUNCTION(H1_F_pc[11], H1L798);


--H1L801 is DE2_Board:inst|cpu_0:the_cpu_0|add~1449
H1L801 = AMPP_FUNCTION(H1_F_pc[12], GND, H1L800);

--H1L802 is DE2_Board:inst|cpu_0:the_cpu_0|add~1450
H1L802 = AMPP_FUNCTION(H1_F_pc[12], H1L800);


--H1L803 is DE2_Board:inst|cpu_0:the_cpu_0|add~1451
H1L803 = AMPP_FUNCTION(H1_F_pc[13], GND, H1L802);

--H1L804 is DE2_Board:inst|cpu_0:the_cpu_0|add~1452
H1L804 = AMPP_FUNCTION(H1_F_pc[13], H1L802);


--H1L805 is DE2_Board:inst|cpu_0:the_cpu_0|add~1453
H1L805 = AMPP_FUNCTION(H1_F_pc[14], GND, H1L804);

--H1L806 is DE2_Board:inst|cpu_0:the_cpu_0|add~1454
H1L806 = AMPP_FUNCTION(H1_F_pc[14], H1L804);


--H1L807 is DE2_Board:inst|cpu_0:the_cpu_0|add~1455
H1L807 = AMPP_FUNCTION(H1_F_pc[15], GND, H1L806);

--H1L808 is DE2_Board:inst|cpu_0:the_cpu_0|add~1456
H1L808 = AMPP_FUNCTION(H1_F_pc[15], H1L806);


--H1L809 is DE2_Board:inst|cpu_0:the_cpu_0|add~1457
H1L809 = AMPP_FUNCTION(H1_F_pc[16], GND, H1L808);

--H1L810 is DE2_Board:inst|cpu_0:the_cpu_0|add~1458
H1L810 = AMPP_FUNCTION(H1_F_pc[16], H1L808);


--H1L811 is DE2_Board:inst|cpu_0:the_cpu_0|add~1459
H1L811 = AMPP_FUNCTION(H1_F_pc[17], GND, H1L810);

--H1L812 is DE2_Board:inst|cpu_0:the_cpu_0|add~1460
H1L812 = AMPP_FUNCTION(H1_F_pc[17], H1L810);


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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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