<!--
This XML file (created on Fri Mar 21 17:45:04 2008) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature.  To enable/disable this feature, run
qtb_install.exe located in your quartus/bin folder.  For more information, go
to www.altera.com/products/software/download/dnl-download_license.html
-->
<talkback>
<ver>5.1</ver>
<schema>quartus_version_5.1_build_176.xsd</schema><license>
	<host_id>000cf1496c62</host_id>
	<nic_id>000cf1496c62</nic_id>
	<cdrive_id>38441af0</cdrive_id>
</license>
<tool>
	<name>Quartus II</name>
	<version>5.1</version>
	<build>Build 176</build>
	<binary_type>32</binary_type>
	<module>quartus_fit.exe</module>
	<edition>Web Edition</edition>
	<compilation_end_time>Fri Mar 21 17:45:05 2008</compilation_end_time>
</tool>
<machine>
	<os>Windows XP</os>
	<cpu>
		<proc_count>1</proc_count>
		<cpu_freq units="MHz">1399</cpu_freq>
	</cpu>
	<ram units="MB">751</ram>
</machine>
<top_file>E:/EDA_QuartusII/chap6_vhdl2/counter_6.1/cnt42</top_file>
<resource_usage_summary>
	<rsc name="Logic cells" util="13" max=" 32 " type="int">4 </rsc>
	<rsc name="Registers" util="13" max=" 32 " type="int">4 </rsc>
	<rsc name="Number of pterms used" type="int">3</rsc>
	<rsc name="User inserted logic elements" type="int">0</rsc>
	<rsc name="I/O pins" util="25" max=" 36 " type="int">9 </rsc>
	<rsc name="-- Clock pins" util="50" max=" 2 " type="int">1 </rsc>
	<rsc name="-- Dedicated input pins" util="0" max=" 2 " type="int">0 </rsc>
	<rsc name="Global signals" type="int">1</rsc>
	<rsc name="Shareable expanders" util="0" max=" 32 " type="int">0 </rsc>
	<rsc name="Parallel expanders" util="0" max=" 30 " type="int">0 </rsc>
	<rsc name="Cells using turbo bit" util="13" max=" 32 " type="int">4 </rsc>
	<rsc name="Maximum fan-out node" type="text">lpm_counter:Q1_rtl_0|dffs[0]</rsc>
	<rsc name="Maximum fan-out" type="int">4</rsc>
	<rsc name="Highest non-global fan-out signal" type="text">lpm_counter:Q1_rtl_0|dffs[0]</rsc>
	<rsc name="Highest non-global fan-out" type="int">4</rsc>
	<rsc name="Total fan-out" type="int">14</rsc>
	<rsc name="Average fan-out" type="float">1.08</rsc>
</resource_usage_summary>
<control_signals>
	<row>
		<name>CLK</name>
		<location>PIN_43</location>
		<fan_out>4</fan_out>
		<usage>Clock</usage>
		<global>yes</global>
		<global_resource_used>On</global_resource_used>
	</row>
</control_signals>
<non_global_high_fan_out_signals>
	<row>
		<name>lpm_counter:Q1_rtl_0|dffs[0]</name>
		<fan_out>4</fan_out>
	</row>
	<row>
		<name>lpm_counter:Q1_rtl_0|dffs[1]</name>
		<fan_out>3</fan_out>
	</row>
	<row>
		<name>lpm_counter:Q1_rtl_0|dffs[2]</name>
		<fan_out>2</fan_out>
	</row>
	<row>
		<name>lpm_counter:Q1_rtl_0|dffs[3]</name>
		<fan_out>1</fan_out>
	</row>
</non_global_high_fan_out_signals>
<interconnect_usage_summary>
	<rsc name="Output enables" util="0" max=" 6 " type="int">0 </rsc>
	<rsc name="PIA buffers" util="4" max=" 72 " type="int">3 </rsc>
</interconnect_usage_summary>
<mep_data>
	<command_line>quartus_fit --read_settings_files=off --write_settings_files=off cnt42 -c cnt42</command_line>
</mep_data>
<software_data>
	<smart_recompile>off</smart_recompile>
</software_data>
<messages>
	<info>Info: Quartus II Fitter was successful. 0 errors, 0 warnings</info>
	<info>Info: Elapsed time: 00:00:01</info>
	<info>Info: Processing ended: Fri Mar 21 17:45:04 2008</info>
	<info>Info: Automatically selected device EPM7032SLC44-5 for design cnt42</info>
	<info>Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off cnt42 -c cnt42</info>
</messages>
<fitter_settings>
	<row>
		<option>Device</option>
		<setting>AUTO</setting>
	</row>
	<row>
		<option>Use smart compilation</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Optimize Timing</option>
		<setting>Normal compilation</setting>
		<default_value>Normal compilation</default_value>
	</row>
	<row>
		<option>Optimize IOC Register Placement for Timing</option>
		<setting>On</setting>
		<default_value>On</default_value>
	</row>
	<row>
		<option>Limit to One Fitting Attempt</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Fitter Initial Placement Seed</option>
		<setting>1</setting>
		<default_value>1</default_value>
	</row>
	<row>
		<option>Slow Slew Rate</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Fitter Effort</option>
		<setting>Auto Fit</setting>
		<default_value>Auto Fit</default_value>
	</row>
</fitter_settings>
<fitter_device_options>
	<row>
		<option>Enable user-supplied start-up clock (CLKUSR)</option>
		<setting>Off</setting>
	</row>
	<row>
		<option>Enable device-wide reset (DEV_CLRn)</option>
		<setting>Off</setting>
	</row>
	<row>
		<option>Enable device-wide output enable (DEV_OE)</option>
		<setting>Off</setting>
	</row>
	<row>
		<option>Enable INIT_DONE output</option>
		<setting>Off</setting>
	</row>
	<row>
		<option>Configuration scheme</option>
		<setting>Passive Serial</setting>
	</row>
	<row>
		<option>Reserve all unused pins</option>
		<setting>As output driving an unspecified signal</setting>
	</row>
	<row>
		<option>Security bit</option>
		<setting>Off</setting>
	</row>
	<row>
		<option>Base pin-out file on sameframe device</option>
		<setting>Off</setting>
	</row>
</fitter_device_options>
<input_pins>
	<row>
		<name>CLK</name>
		<pin__>43</pin__>
		<combinational_fan_out>4</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>yes</global>
		<input_register>no</input_register>
		<i_o_standard>TTL</i_o_standard>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
</input_pins>
<output_pins>
	<row>
		<name>Q[0]</name>
		<pin__>4</pin__>
		<lab>1</lab>
		<output_register>no</output_register>
		<slow_slew_rate>no</slow_slew_rate>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>Q[1]</name>
		<pin__>5</pin__>
		<lab>1</lab>
		<output_register>no</output_register>
		<slow_slew_rate>no</slow_slew_rate>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>Q[2]</name>
		<pin__>6</pin__>
		<lab>1</lab>
		<output_register>no</output_register>
		<slow_slew_rate>no</slow_slew_rate>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>Q[3]</name>
		<pin__>8</pin__>
		<lab>1</lab>
		<output_register>no</output_register>
		<slow_slew_rate>no</slow_slew_rate>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
</output_pins>
<compilation_summary>
	<flow_status>Successful - Fri Mar 21 17:45:04 2008</flow_status>
	<quartus_ii_version>5.1 Build 176 10/26/2005 SJ Web Edition</quartus_ii_version>
	<revision_name>cnt42</revision_name>
	<top_level_entity_name>CNT42</top_level_entity_name>
	<family>MAX7000S</family>
	<met_timing_requirements>N/A</met_timing_requirements>
	<total_macrocells>4 / 32 ( 13 % )</total_macrocells>
	<total_pins>9 / 36 ( 25 % )</total_pins>
	<device>EPM7032SLC44-5</device>
	<timing_models>Final</timing_models>
</compilation_summary>
<compile_id>E3D989C6</compile_id>
<files>
	<top>E:/EDA_QuartusII/chap6_vhdl2/counter_6.1/cnt42.vhd</top>
	<extensions>
		<ext ext_name="vhd">1</ext>
		<ext ext_name="tdf">1</ext>
		<ext ext_name="inc">12</ext>
		<ext ext_name="lst">1</ext>
	</extensions>
	<sub_files>
		<sub_file>E:/EDA_QuartusII/chap6_vhdl2/counter_6.1/cnt42.vhd</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_constant.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_decode.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/cmpconst.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_compare.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/lpm_counter.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/dffeea.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/alt_synch_counter.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/alt_synch_counter_f.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/alt_counter_stratix.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/aglobal51.inc</sub_file>
		<sub_file>d:/altera/quartus51/libraries/megafunctions/cbx.lst</sub_file>
	</sub_files>
</files>
<architecture>
	<family>MAX7000S</family>
	<auto_device>ON</auto_device>
	<device>EPM7032SLC44-5</device>
</architecture>
<pkg_io>
	<pin_std count="9">TTL</pin_std>
</pkg_io>
</talkback>