?? ph.vhd
字號:
library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;entity Ph isPort ( A,B,CLK : in std_logic; O0,O1,O2,O3 : out std_logic_vector(6 downto 0));end Ph;architecture art of Ph is signal A1,B1,A2,B2,A_U,B_U,PD : std_logic := '0'; signal count14b : std_logic_vector(13 downto 0) := (others => '0'); signal count26b : std_logic_vector(25 downto 0) := (others => '0'); signal en,load,clr : std_logic := '0'; signal O_3,O_2,O_1,O_0 : std_logic_vector(3 downto 0) := (others => '0');beginprocess(Clk) procedure decoder(signal input: in std_logic_vector(3 downto 0); signal output: out std_logic_vector(6 downto 0)) is begin case input is when "0000" => output <= "0000001"; when "0001" => output <= "1001111"; when "0010" => output <= "0010010"; when "0011" => output <= "0000110"; when "0100" => output <= "1001100"; when "0101" => output <= "0100100"; when "0110" => output <= "0100000"; when "0111" => output <= "0001111"; when "1000" => output <= "0000000"; when "1001" => output <= "0000100"; when others => output <= "-------"; end case; end decoder; begin if Clk'event and Clk = '1' then A1 <= A; A2 <= A1; A_U <= A1 and (not A2); B1 <= B; B2 <= B1; B_U <= B1 and (not B2); if A_U = '1' then PD <= '1'; end if; if B_U = '1' then PD <= '0'; end if; count26b <= count26b + 1; if count26b= 0 then en <= '1'; elsif count26b =3600*16384 then en <= '0'; end if; if count26b = 3800*16384 then load <= '1'; else load <= '0'; end if; if count26b = 4200*16384 then clr <= '1'; else clr <= '0'; end if; if clr = '1' then count14b <= (others => '0'); O_0 <="0000"; O_1 <="0000"; O_2 <="0000"; O_3 <="0000"; elsif en = '1' and PD = '1' then count14b <= count14b + 1; if count14b = 16383 then if O_0 = "1001" then O_0 <= "0000"; if O_1 = "1001" then O_1 <= "0000"; if O_2 = "1001" then O_2 <= "0000"; if O_3 = "1001" then O_3 <= "0000"; else O_3 <= O_3 + 1; end if; else O_2 <= O_2 + 1; end if; else O_1 <= O_1 + 1; end if; else O_0 <= O_0 + 1; end if; end if; end if; if load = '1' then decoder(O_0,o0); decoder(O_1,o1); decoder(O_2,o2); decoder(O_3,o3); end if; end if; end process;end art;
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