?? lib_at91sam7s64a.h
字號:
{
//* Write to the IER register
pSPI->SPI_IER = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_DisableIt
//* \brief Disable SPI interrupt
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_DisableIt (
AT91PS_SPI pSPI, // pointer to a SPI controller
unsigned int flag) // IT to be disabled
{
//* Write to the IDR register
pSPI->SPI_IDR = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_Reset
//* \brief Reset the SPI controller
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_Reset (
AT91PS_SPI pSPI // pointer to a SPI controller
)
{
//* Write to the CR register
pSPI->SPI_CR = AT91C_SPI_SWRST;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_Enable
//* \brief Enable the SPI controller
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_Enable (
AT91PS_SPI pSPI // pointer to a SPI controller
)
{
//* Write to the CR register
pSPI->SPI_CR = AT91C_SPI_SPIEN;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_Disable
//* \brief Disable the SPI controller
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_Disable (
AT91PS_SPI pSPI // pointer to a SPI controller
)
{
//* Write to the CR register
pSPI->SPI_CR = AT91C_SPI_SPIDIS;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_CfgMode
//* \brief Enable the SPI controller
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_CfgMode (
AT91PS_SPI pSPI, // pointer to a SPI controller
int mode) // mode register
{
//* Write to the MR register
pSPI->SPI_MR = mode;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_CfgPCS
//* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_CfgPCS (
AT91PS_SPI pSPI, // pointer to a SPI controller
char PCS_Device) // PCS of the Device
{
//* Write to the MR register
pSPI->SPI_MR &= 0xFFF0FFFF;
pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_ReceiveFrame
//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_SPI_ReceiveFrame (
AT91PS_SPI pSPI,
char *pBuffer,
unsigned int szBuffer,
char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_ReceiveFrame(
(AT91PS_PDC) &(pSPI->SPI_RPR),
pBuffer,
szBuffer,
pNextBuffer,
szNextBuffer);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_SendFrame
//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_SPI_SendFrame(
AT91PS_SPI pSPI,
char *pBuffer,
unsigned int szBuffer,
char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_SendFrame(
(AT91PS_PDC) &(pSPI->SPI_RPR),
pBuffer,
szBuffer,
pNextBuffer,
szNextBuffer);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_Close
//* \brief Close SPI: disable IT disable transfert, close PDC
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_Close (
AT91PS_SPI pSPI) // \arg pointer to a SPI controller
{
//* Reset all the Chip Select register
pSPI->SPI_CSR[0] = 0 ;
pSPI->SPI_CSR[1] = 0 ;
pSPI->SPI_CSR[2] = 0 ;
pSPI->SPI_CSR[3] = 0 ;
//* Reset the SPI mode
pSPI->SPI_MR = 0 ;
//* Disable all interrupts
pSPI->SPI_IDR = 0xFFFFFFFF ;
//* Abort the Peripheral Data Transfers
AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
//* Disable receiver and transmitter and stop any activity immediately
pSPI->SPI_CR = AT91C_SPI_SPIDIS;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_PutChar
//* \brief Send a character,does not check if ready to send
//*----------------------------------------------------------------------------
__inline static void AT91F_SPI_PutChar (
AT91PS_SPI pSPI,
unsigned int character,
unsigned int cs_number )
{
unsigned int value_for_cs;
value_for_cs = (~(1 << cs_number)) & 0xF; //Place a zero among a 4 ONEs number
pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_GetChar
//* \brief Receive a character,does not check if a character is available
//*----------------------------------------------------------------------------
__inline static int AT91F_SPI_GetChar (
const AT91PS_SPI pSPI)
{
return((pSPI->SPI_RDR) & 0xFFFF);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_GetInterruptMaskStatus
//* \brief Return SPI Interrupt Mask Status
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
AT91PS_SPI pSpi) // \arg pointer to a SPI controller
{
return pSpi->SPI_IMR;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_IsInterruptMasked
//* \brief Test if SPI Interrupt is Masked
//*----------------------------------------------------------------------------
__inline static int AT91F_SPI_IsInterruptMasked(
AT91PS_SPI pSpi, // \arg pointer to a SPI controller
unsigned int flag) // \arg flag to be tested
{
return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
}
/* *****************************************************************************
SOFTWARE API FOR PWMC
***************************************************************************** */
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_GetStatus
//* \brief Return PWM Interrupt Status
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_PWMC_GetStatus( // \return PWM Interrupt Status
AT91PS_PWMC pPWM) // pointer to a PWM controller
{
return pPWM->PWMC_SR;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_InterruptEnable
//* \brief Enable PWM Interrupt
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_InterruptEnable(
AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
unsigned int flag) // \arg PWM interrupt to be enabled
{
pPwm->PWMC_IER = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_InterruptDisable
//* \brief Disable PWM Interrupt
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_InterruptDisable(
AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
unsigned int flag) // \arg PWM interrupt to be disabled
{
pPwm->PWMC_IDR = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_GetInterruptMaskStatus
//* \brief Return PWM Interrupt Mask Status
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status
AT91PS_PWMC pPwm) // \arg pointer to a PWM controller
{
return pPwm->PWMC_IMR;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_IsInterruptMasked
//* \brief Test if PWM Interrupt is Masked
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_PWMC_IsInterruptMasked(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg flag to be tested
{
return (AT91F_PWMC_GetInterruptMaskStatus(pPWM) & flag);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_GetStatus
//* \brief Return PWM Interrupt Status
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_PWMC_GetInterruptStatus( // \return PWM Interrupt Status
AT91PS_PWMC pPWM) // pointer to a PWM controller
{
return pPWM->PWMC_ISR;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_IsStatusSet
//* \brief Test if PWM Interrupt is Set
//*----------------------------------------------------------------------------
__inline static unsigned int AT91F_PWMC_IsStatusSet(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg flag to be tested
{
return (AT91F_PWMC_GetStatus(pPWM) & flag);
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_CfgChannel
//* \brief Test if PWM Interrupt is Set
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_CfgChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int channelId, // \arg PWM channel ID
unsigned int mode, // \arg PWM mode
unsigned int period, // \arg PWM period
unsigned int duty) // \arg PWM duty cycle
{
pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_StartChannel
//* \brief Enable channel
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_StartChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_ENA = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_StopChannel
//* \brief Disable channel
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_StopChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_DIS = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PWM_UpdateChannel
//* \brief Update Period or Duty Cycle
//*----------------------------------------------------------------------------
__inline static void AT91F_PWMC_UpdateChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int channelId, // \arg PWM channel ID
unsigned int update) // \arg Channels IDs to be enabled
{
pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
}
/* *****************************************************************************
SOFTWARE API FOR TC
***************************************************************************** */
//*----------------------------------------------------------------------------
//* \fn AT91F_TC_InterruptEnable
//* \brief Enable TC Interrupt
//*----------------------------------------------------------------------------
__inline static void AT91F_TC_InterruptEnable(
AT91PS_TC pTc, // \arg pointer to a TC controller
unsigned int flag) // \arg TC interrupt to be enabled
{
pTc->TC_IER = flag;
}
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