?? t155.vhd
字號:
--
-- This file implements Register inference on variables in clock processes.
-- The variable TMP is read before beeing assigned to hence, infers a flip-flop.
-- Note: Q will also be a flip-flop (signal assignment inside a clocked process).
--
entity TEST is
port( D, CLK : in bit;
Q : out bit);
end TEST;
architecture T155 of TEST is
begin
process(CLK)
variable TMP : bit;
begin
if (CLK'event and CLK='1') then
Q <= TMP;
TMP := D;
end if;
end process;
end T155;
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