Version 5.0 Build 148 04/26/2005 SJ Full Version
32
1614
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
fspi
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Fspi.vhd
1149585088
4
# storage
db|Fspi.(1).cnf
db|Fspi.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
fspi:inst
}
# end
# entity
fifo0
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fifo0.vhd
1145327032
4
# storage
db|Fspi.(2).cnf
db|Fspi.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
fifo0:inst1
}
# end
# entity
dcfifo
# case_insensitive
# source_file
..|..|..|..|altera|quartus50|libraries|megafunctions|dcfifo.tdf
1114012440
6
# storage
db|Fspi.(3).cnf
db|Fspi.(3).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
64
PARAMETER_DEC
USR
LPM_NUMWORDS
256
PARAMETER_DEC
USR
LPM_WIDTHU
8
PARAMETER_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
USE_EAB
ON
PARAMETER_UNKNOWN
USR
ADD_RAM_OUTPUT_REGISTER
ON
PARAMETER_UNKNOWN
USR
DELAY_RDUSEDW
1
PARAMETER_UNKNOWN
DEF
DELAY_WRUSEDW
1
PARAMETER_UNKNOWN
DEF
RDSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
WRSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
CLOCKS_ARE_SYNCHRONIZED
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
dcfifo_miu
PARAMETER_UNKNOWN
USR
}
# used_port {
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data2
data30
data31
data32
data33
data34
data35
data36
data37
data38
data39
data3
data40
data41
data42
data43
data44
data45
data46
data47
data48
data49
data4
data50
data51
data52
data53
data54
data55
data56
data57
data58
data59
data5
data60
data61
data62
data63
data6
data7
data8
data9
q0
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q1
q20
q21
q22
q23
q24
q25
q26
q27
q28
q29
q2
q30
q31
q32
q33
q34
q35
q36
q37
q38
q39
q3
q40
q41
q42
q43
q44
q45
q46
q47
q48
q49
q4
q50
q51
q52
q53
q54
q55
q56
q57
q58
q59
q5
q60
q61
q62
q63
q6
q7
q8
q9
rdclk
rdempty
rdreq
wrclk
wrfull
wrreq
}
# include_file {
..|..|..|..|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
..|..|..|..|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
..|..|..|..|altera|quartus50|libraries|megafunctions|altdpram.inc
1107573082
..|..|..|..|altera|quartus50|libraries|megafunctions|a_graycounter.inc
1114503124
..|..|..|..|altera|quartus50|libraries|megafunctions|a_fefifo.inc
1107571958
..|..|..|..|altera|quartus50|libraries|megafunctions|a_gray2bin.inc
1107571990
..|..|..|..|altera|quartus50|libraries|megafunctions|dffpipe.inc
1107574172
..|..|..|..|altera|quartus50|libraries|megafunctions|alt_sync_fifo.inc
1107572648
..|..|..|..|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
..|..|..|..|altera|quartus50|libraries|megafunctions|altsyncram_fifo.inc
1107573526
..|..|..|..|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component
}
# end
# entity
dcfifo_miu
# case_insensitive
# source_file
db|dcfifo_miu.tdf
1146145342
6
# storage
db|Fspi.(4).cnf
db|Fspi.(4).cnf
# user_parameter {
lpm_widthu
8
PARAMETER_DEC
USR
}
# used_port {
data0
data1
data2
data3
data4
data5
data6
data7
data8
data9
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data30
data31
data32
data33
data34
data35
data36
data37
data38
data39
data40
data41
data42
data43
data44
data45
data46
data47
data48
data49
data50
data51
data52
data53
data54
data55
data56
data57
data58
data59
data60
data61
data62
data63
rdclk
rdreq
wrclk
wrreq
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q20
q21
q22
q23
q24
q25
q26
q27
q28
q29
q30
q31
q32
q33
q34
q35
q36
q37
q38
q39
q40
q41
q42
q43
q44
q45
q46
q47
q48
q49
q50
q51
q52
q53
q54
q55
q56
q57
q58
q59
q60
q61
q62
q63
rdempty
wrfull
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated
}
# end
# entity
a_gray2bin_p4b
# case_insensitive
# source_file
db|a_gray2bin_p4b.tdf
1146145342
6
# storage
db|Fspi.(5).cnf
db|Fspi.(5).cnf
# used_port {
gray0
gray1
gray2
gray3
gray4
gray5
gray6
gray7
bin0
bin1
bin2
bin3
bin4
bin5
bin6
bin7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_gray2bin_p4b:read_side_gray_converter
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_gray2bin_p4b:write_side_gray_converter
}
# end
# entity
a_graycounter_i06
# case_insensitive
# source_file
db|a_graycounter_i06.tdf
1146145342
6
# storage
db|Fspi.(6).cnf
db|Fspi.(6).cnf
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_graycounter_i06:rdptr_g
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_graycounter_i06:wrptr_g
}
# end
# entity
a_graycounter_j06
# case_insensitive
# source_file
db|a_graycounter_j06.tdf
1146145342
6
# storage
db|Fspi.(7).cnf
db|Fspi.(7).cnf
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_graycounter_j06:read_counter_for_write
}
# end
# entity
alt_synch_pipe_2a3
# case_insensitive
# source_file
db|alt_synch_pipe_2a3.tdf
1146145342
6
# storage
db|Fspi.(217).cnf
db|Fspi.(217).cnf
# used_port {
clock
clrn
d0
d1
d2
d3
d4
d5
d6
d7
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|alt_synch_pipe_2a3:read_sync_registers
}
# end
# entity
dffpipe_2a3
# case_insensitive
# source_file
db|dffpipe_2a3.tdf
1146145342
6
# storage
db|Fspi.(220).cnf
db|Fspi.(220).cnf
# used_port {
clock
clrn
d0
d1
d2
d3
d4
d5
d6
d7
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|alt_synch_pipe_2a3:read_sync_registers|dffpipe_2a3:dffpipe10
}
# end
# entity
alt_synch_pipe_3a3
# case_insensitive
# source_file
db|alt_synch_pipe_3a3.tdf
1146145342
6
# storage
db|Fspi.(221).cnf
db|Fspi.(221).cnf
# used_port {
clock
clrn
d0
d1
d2
d3
d4
d5
d6
d7
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|alt_synch_pipe_3a3:write_sync_registers
}
# end
# entity
dffpipe_3a3
# case_insensitive
# source_file
db|dffpipe_3a3.tdf
1146145342
6
# storage
db|Fspi.(222).cnf
db|Fspi.(222).cnf
# used_port {
clock
clrn
d0
d1
d2
d3
d4
d5
d6
d7
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|alt_synch_pipe_3a3:write_sync_registers|dffpipe_3a3:dffpipe14
}
# end
# entity
add_sub_fub
# case_insensitive
# source_file
db|add_sub_fub.tdf
1146145342
6
# storage
db|Fspi.(223).cnf
db|Fspi.(223).cnf
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
result0
result1
result2
result3
result4
result5
result6
result7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|add_sub_fub:rdusedw_subtractor
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|add_sub_fub:wrusedw_subtractor
}
# end
# entity
cntr_uu7
# case_insensitive
# source_file
db|cntr_uu7.tdf
1146145342
6
# storage
db|Fspi.(224).cnf
db|Fspi.(224).cnf
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
q6
q7
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|cntr_uu7:rdptr_b
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|cntr_uu7:wrptr_b
}
# end
# entity
scfifo
# case_insensitive
# source_file
..|..|..|..|altera|quartus50|libraries|megafunctions|scfifo.tdf
1114012440
6
# storage
db|Fspi.(225).cnf
db|Fspi.(225).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
lpm_width
64
PARAMETER_UNKNOWN
USR
LPM_NUMWORDS
3
PARAMETER_UNKNOWN
USR
LPM_WIDTHU
2
PARAMETER_UNKNOWN
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
DEF
ADD_RAM_OUTPUT_REGISTER
ON
PARAMETER_UNKNOWN
USR
ALMOST_FULL_VALUE
0
PARAMETER_UNKNOWN
DEF
ALMOST_EMPTY_VALUE
0
PARAMETER_UNKNOWN
DEF
USE_EAB
OFF
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clock
data0
data1
data2
data3
data4
data5
data6
data7
data8
data9
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data30
data31
data32
data33
data34
data35
data36
data37
data38
data39
data40
data41
data42
data43
data44
data45
data46
data47
data48
data49
data50
data51
data52
data53
data54
data55
data56
data57
data58
data59
data60
data61
data62
data63
rdreq
wrreq
empty
full
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q20
q21
q22
q23
q24
q25
q26
q27
q28
q29
q30
q31
q32
q33
q34
q35
q36
q37
q38
q39
q40
q41
q42
q43
q44
q45
q46
q47
q48
q49
q50
q51
q52
q53
q54
q55
q56
q57
q58
q59
q60
q61
q62
q63
}
# include_file {
..|..|..|..|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
..|..|..|..|altera|quartus50|libraries|megafunctions|a_regfifo.inc
1107572164
..|..|..|..|altera|quartus50|libraries|megafunctions|a_dpfifo.inc
1107571908
..|..|..|..|altera|quartus50|libraries|megafunctions|a_i2fifo.inc
1107572036
..|..|..|..|altera|quartus50|libraries|megafunctions|a_fffifo.inc
1107571974
..|..|..|..|altera|quartus50|libraries|megafunctions|a_f2fifo.inc
1107571944
}
# hierarchies {
fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|scfifo:output_channel
}
# end
# entity
a_fffifo
# case_insensitive
# source_file
..|..|..|..|altera|quartus50|libraries|megafunctions|a_fffifo.tdf
1114012442
6
# storage
db|Fspi.(226).cnf
db|Fspi.(226).cnf
# user_parameter {
LPM_WIDTH
64
PARAMETER_UNKNOWN
USR
LPM_NUMWORDS
3
PARAMETER_UNKNOWN
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
USR