-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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--A1L3 is process0~0
--operation mode is normal

A1L3 = ds # ps;


--ds is ds
--operation mode is input

ds = INPUT();


--ps is ps
--operation mode is input

ps = INPUT();


--ce is ce
--operation mode is output

ce = OUTPUT(A1L3);